/*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
+ * Copyright (C) 2004 Tyan
* Copyright (C) 2007 AMD
* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
*
#include <uart8250.h>
#include <pc80/keyboard.h>
#include <pc80/mc146818rtc.h>
+#include <stdlib.h>
#include "chip.h"
#include "w83627ehg.h"
static void pnp_enter_ext_func_mode(device_t dev)
{
- outb(0x87, dev->path.u.pnp.port);
- outb(0x87, dev->path.u.pnp.port);
+ outb(0x87, dev->path.pnp.port);
+ outb(0x87, dev->path.pnp.port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
- outb(0xaa, dev->path.u.pnp.port);
+ outb(0xaa, dev->path.pnp.port);
}
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
return inb(port_base + 1);
}
-static void enable_hwm_smbus(device_t dev) {
+static void enable_hwm_smbus(device_t dev)
+{
/* Set the pin 91,92 as I2C bus. */
uint8_t reg, value;
reg = 0x2a;
get_option(&power_on, "power_on_after_fail");
pnp_enter_ext_func_mode(dev);
- pnp_write_index(dev->path.u.pnp.port, 7, 0x0a);
+ pnp_write_index(dev->path.pnp.port, 7, 0x0a);
value = pnp_read_config(dev, 0xe4);
value &= ~(3 << 5);
if (power_on) {
0x48, 0x7f, 0x2a, /* Set SMBus base to 0x54 >> 1. */
};
- for(i = 0; i < sizeof(hwm_reg_values)/sizeof(hwm_reg_values[0]); i += 3) {
+ for(i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
reg = hwm_reg_values[i];
value = pnp_read_index(base, reg);
value &= 0xff & (~(hwm_reg_values[i + 1]));
value |= 0xff & hwm_reg_values[i + 2];
- // printk_debug("base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value);
+ /* printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, value = 0x%02x\r\n", base, reg,value); */
pnp_write_index(base, reg, value);
}
}
return;
}
conf = dev->chip_info;
- switch(dev->path.u.pnp.device) {
+ switch(dev->path.pnp.device) {
case W83627EHG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
case W83627EHG_KBC:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
- init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+ pc_keyboard_init(&conf->keyboard);
break;
case W83627EHG_HWM:
res0 = find_resource(dev, PNP_IDX_IO0);
}
}
-void w83627ehg_pnp_set_resources(device_t dev)
+static void w83627ehg_pnp_set_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_set_resources(dev);
pnp_exit_ext_func_mode(dev);
}
-void w83627ehg_pnp_enable_resources(device_t dev)
+static void w83627ehg_pnp_enable_resources(device_t dev)
{
pnp_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
- switch (dev->path.u.pnp.device) {
+ switch (dev->path.pnp.device) {
case W83627EHG_HWM:
- printk_debug("w83627ehg hwm smbus enabled\n");
+ printk(BIOS_DEBUG, "w83627ehg hwm smbus enabled\n");
enable_hwm_smbus(dev);
break;
}
pnp_exit_ext_func_mode(dev);
}
-void w83627ehg_pnp_enable(device_t dev)
+static void w83627ehg_pnp_enable(device_t dev)
{
if (!dev->enabled) {
pnp_enter_ext_func_mode(dev);
{ &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- // No 4 { 0,},
+ /* No 4 { 0,}, */
{ &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
- { &ops, W83627EHG_GPIO_GAME_MIDI, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
{ &ops, W83627EHG_WDTO_PLED, },
- { &ops, W83627EHG_GPIO_SUSLED, },
{ &ops, W83627EHG_ACPI, },
{ &ops, W83627EHG_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
+ { &ops, W83627EHG_GAME, PNP_IO0, { 0x7ff, 0 }, },
+ { &ops, W83627EHG_MIDI, PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 } , {0x7fe, 0x4}, },
+ { &ops, W83627EHG_GPIO1, },
+ { &ops, W83627EHG_GPIO2, },
+ { &ops, W83627EHG_GPIO3, },
+ { &ops, W83627EHG_GPIO4, },
+ { &ops, W83627EHG_GPIO5, },
+ { &ops, W83627EHG_GPIO6, },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,
- sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+ ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627ehg_ops = {
CHIP_NAME("Winbond W83627EHG Super I/O")
.enable_dev = enable_dev,
};
-