Remove superfluous Super I/O res0/res1 lines.

[coreboot.git] / src / superio / winbond / w83627dhg / superio.c

diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c
index 9398313ea49ab02fc37aece5eb2e0ebfb356e1f6..b94f4fee1b51ba66c4704b2f19a8f0586f8f5133 100644 (file)
--- a/src/superio/winbond/w83627dhg/superio.c
+++ b/src/superio/winbond/w83627dhg/superio.c
@@ -28,26 +28,24 @@
 
 static void pnp_enter_ext_func_mode(device_t dev)
 {
-       outb(0x87, dev->path.u.pnp.port);
-       outb(0x87, dev->path.u.pnp.port);
+       outb(0x87, dev->path.pnp.port);
+       outb(0x87, dev->path.pnp.port);
 }
 
 static void pnp_exit_ext_func_mode(device_t dev)
 {
-       outb(0xaa, dev->path.u.pnp.port);
+       outb(0xaa, dev->path.pnp.port);
 }
 
 static void w83627dhg_init(device_t dev)
 {
-       struct superio_winbond_w83627dhg_config *conf;
-       struct resource *res0, *res1;
+       struct superio_winbond_w83627dhg_config *conf = dev->chip_info;
+       struct resource *res0;
 
        if (!dev->enabled)
                return;
 
-       conf = dev->chip_info;
-
-       switch(dev->path.u.pnp.device) {
+       switch(dev->path.pnp.device) {
        case W83627DHG_SP1:
                res0 = find_resource(dev, PNP_IDX_IO0);
                init_uart8250(res0->base, &conf->com1);
@@ -57,28 +55,26 @@ static void w83627dhg_init(device_t dev)
                init_uart8250(res0->base, &conf->com2);
                break;
        case W83627DHG_KBC:
-               res0 = find_resource(dev, PNP_IDX_IO0);
-               res1 = find_resource(dev, PNP_IDX_IO1);
-               init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+               pc_keyboard_init(&conf->keyboard);
                break;
        }
 }
 
-void w83627dhg_pnp_set_resources(device_t dev)
+static void w83627dhg_pnp_set_resources(device_t dev)
 {
        pnp_enter_ext_func_mode(dev);
        pnp_set_resources(dev);
        pnp_exit_ext_func_mode(dev);
 }
 
-void w83627dhg_pnp_enable_resources(device_t dev)
+static void w83627dhg_pnp_enable_resources(device_t dev)
 {
        pnp_enter_ext_func_mode(dev);
        pnp_enable_resources(dev);
        pnp_exit_ext_func_mode(dev);
 }
 
-void w83627dhg_pnp_enable(device_t dev)
+static void w83627dhg_pnp_enable(device_t dev)
 {
        if (!dev->enabled)
                return;
@@ -103,7 +99,8 @@ static struct pnp_info pnp_dev_info[] = {
        { &ops, W83627DHG_SP1, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
        { &ops, W83627DHG_SP2, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 }, },
        { &ops, W83627DHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0xfff, 0 }, { 0xfff, 0x4}, },
-       { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, },
+       /* the next line makes coreboot hang in pnp_enable_devices() */
+       /* { &ops, W83627DHG_SPI, PNP_IO1, { 0xff8, 0 }, }, */
        { &ops, W83627DHG_GPIO6, },
        { &ops, W83627DHG_WDTO_PLED, },
        { &ops, W83627DHG_GPIO2345, },