C and other Super I/O cosmetic fixes.

[coreboot.git] / src / superio / smsc / smscsuperio / smscsuperio_early_serial.c

diff --git a/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c b/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
index 4cb4e18529672067b94f43b26fcc0ab92b159035..ff47c4e331981dbcbb7f490786f53bd6f1028f78 100644 (file)
--- a/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
+++ b/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
@@ -19,6 +19,7 @@
  */
 
 #include <arch/romcc_io.h>
+#include <device/pnp_def.h>
 
 /* All known/supported SMSC Super I/Os have the same logical device IDs
  * for the serial ports (COM1, COM2).
@@ -30,11 +31,11 @@
  * Enable the specified serial port.
  *
  * @param dev The device to use.
- * @param dev The I/O base of the serial port (usually 0x3f8/0x2f8).
+ * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
  */
-static inline void smscsuperio_enable_serial(device_t dev, uint16_t iobase)
+static void smscsuperio_enable_serial(device_t dev, u16 iobase)
 {
-       uint16_t port = dev >> 8;
+       u16 port = dev >> 8;
 
        outb(0x55, port);               /* Enter the configuration state. */
        pnp_set_logical_device(dev);