-/* Copyright 2000 AG Electronics Ltd. */
-/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2000 AG Electronics Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
#include <arch/io.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pnp.h>
+#include <stdlib.h>
#include "chip.h"
#include "pc97307.h"
static void init(device_t dev)
{
struct superio_nsc_pc97307_config *conf;
- struct resource *res0, *res1;
+ struct resource *res0;
if (!dev->enabled) {
return;
}
conf = dev->chip_info;
- switch(dev->path.u.pnp.device) {
+ switch(dev->path.pnp.device) {
case PC97307_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 Mhz */
pnp_set_enable(dev, 1); /* Enable keyboard */
- res0 = find_resource(dev, PNP_IDX_IO0);
- res1 = find_resource(dev, PNP_IDX_IO1);
- init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+ pc_keyboard_init(&conf->keyboard);
break;
case PC97307_FDC:
};
static struct pnp_info pnp_dev_info[] = {
- { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
- { &ops, PC97307_KBCM, PNP_IRQ0 },
- { &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
- { &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
- { &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
- { &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
- { &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
- { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
- { &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } },
+ { &ops, PC97307_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0xffb, 0 }, { 0xffb, 0x4}, },
+ { &ops, PC97307_KBCM, PNP_IRQ0 },
+ { &ops, PC97307_RTC, PNP_IO0 | PNP_IRQ0, { 0xfffe, 0}, },
+ { &ops, PC97307_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0xfffa, 0}, },
+ { &ops, PC97307_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x03fc, 0}, },
+ { &ops, PC97307_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0xfff8, 0 }, },
+ { &ops, PC97307_SP1, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 }, },
+ { &ops, PC97307_GPIO, PNP_IO0, { 0xfff8, 0 } },
+ { &ops, PC97307_PM, PNP_IO0, { 0xfffe, 0 } },
};
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,
- sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+ ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_nsc_pc97307_ops = {