Please bear with me - another rename checkin. This qualifies as trivial, no

[coreboot.git] / src / superio / ite / it8716f / superio.c

diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c
index f8cdd42bef1b2ffb75e2dd736352edb158b62bb9..f310511d95223df9fa25cdf553ab759e41d5a2f8 100644 (file)
--- a/src/superio/ite/it8716f/superio.c
+++ b/src/superio/ite/it8716f/superio.c
@@ -1,10 +1,10 @@
 /*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
  *
  * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
- *
  * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
+ * (Written by Yinghai Lu <yinghai.lu@amd.com> for AMD)
+ * Copyright (C) 2007 Ward Vandewege <ward@gnu.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -23,11 +23,12 @@
 
 #include <device/device.h>
 #include <device/pnp.h>
+#include <console/console.h>
 #include <uart8250.h>
 #include <pc80/keyboard.h>
+#include <arch/io.h>
 #include "chip.h"
 #include "it8716f.h"
-#include <arch/io.h>
 
 /* Base address 0x2e: 0x87 0x01 0x55 0x55. */
 /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
@@ -49,6 +50,34 @@ static void pnp_exit_ext_func_mode(device_t dev)
        pnp_write_config(dev, 0x02, 0x02);
 }
 
+static void pnp_write_index(uint16_t port_base, uint8_t reg, uint8_t value)
+{
+       outb(reg, port_base);
+       outb(value, port_base + 1);
+}
+
+static uint8_t pnp_read_index(uint16_t port_base, uint8_t reg)
+{
+       outb(reg, port_base);
+       return inb(port_base + 1);
+}
+
+static void init_ec(uint16_t base)
+{
+       uint8_t value;
+
+       /* Read out current value of FAN_CTL control register (0x14). */
+       value = pnp_read_index(base, 0x14);
+       printk_debug("FAN_CTL: reg = 0x%04x, read value = 0x%02x\r\n",
+                    base + 0x14, value);
+
+       /* Set FAN_CTL control register (0x14) polarity to high, and
+          activate fans 1, 2 and 3. */
+       pnp_write_index(base, 0x14, value | 0x87);
+       printk_debug("FAN_CTL: reg = 0x%04x, writing value = 0x%02x\r\n",
+                    base + 0x14, value | 0x87);
+}
+
 static void it8716f_init(device_t dev)
 {
        struct superio_ite_it8716f_config *conf;
@@ -60,7 +89,7 @@ static void it8716f_init(device_t dev)
 
        conf = dev->chip_info;
 
-       /* TODO: FDC, PP, EC, KBCM, MIDI, GAME, IR. */
+       /* TODO: FDC, PP, KBCM, MIDI, GAME, IR. */
        switch (dev->path.u.pnp.device) {
        case IT8716F_SP1:
                res0 = find_resource(dev, PNP_IDX_IO0);
@@ -70,6 +99,11 @@ static void it8716f_init(device_t dev)
                res0 = find_resource(dev, PNP_IDX_IO0);
                init_uart8250(res0->base, &conf->com2);
                break;
+       case IT8716F_EC:
+               res0 = find_resource(dev, PNP_IDX_IO0);
+#define EC_INDEX_PORT 5
+               init_ec(res0->base + EC_INDEX_PORT);
+               break;
        case IT8716F_KBCK:
                res0 = find_resource(dev, PNP_IDX_IO0);
                res1 = find_resource(dev, PNP_IDX_IO1);
@@ -109,27 +143,28 @@ static struct device_operations ops = {
 };
 
 static struct pnp_info pnp_dev_info[] = {
-       { &ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-       { &ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
-       { &ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
-       { &ops, IT8716F_EC, },
-       { &ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
-       { &ops, IT8716F_KBCM, PNP_IRQ0, },
-       // No 7 { 0,},
-       { &ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4}, },
-       { &ops, IT8716F_GAME, PNP_IO0, { 0x7ff, 0 }, },
-       { &ops, IT8716F_IR, },
+       {&ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
+       {&ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
+       {&ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
+       {&ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
+       {&ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
+        {0x7f8, 0x4},},
+       {&ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0},
+        {0x7ff, 0x4},},
+       {&ops, IT8716F_KBCM, PNP_IRQ0,},
+       {&ops, IT8716F_GPIO,},
+       {&ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},},
+       {&ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},},
+       {&ops, IT8716F_IR,},
 };
 
 static void enable_dev(struct device *dev)
 {
        pnp_enable_devices(dev, &ops,
-               sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
+               sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]), pnp_dev_info);
 }
 
 struct chip_operations superio_ite_it8716f_ops = {
        CHIP_NAME("ITE IT8716F Super I/O")
        .enable_dev = enable_dev,
 };
-