/*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
*
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
*
*/
#include <arch/romcc_io.h>
-#include <device/device.h>
#include "it8712f.h"
/* The base address is 0x2e or 0x4e, depending on config bytes. */
#define SIO_BASE 0x2e
#define SIO_INDEX SIO_BASE
-#define SIO_DATA SIO_BASE+1
+#define SIO_DATA (SIO_BASE + 1)
/* Global configuration registers. */
#define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
#define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */
#define IT8712F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
#define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
+#define IT8712F_CONFIG_REG_MFC 0x2a /* Multi-function control */
+#define IT8712F_CONFIG_REG_WATCHDOG 0x72 /* Watchdog control. */
-#define IT8712F_CONFIGURATION_PORT 0x2e /* Write-only. */
-
-/* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the
- LDN the register belongs to, before you can access the register. */
-static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
+static void it8712f_sio_write(u8 ldn, u8 index, u8 value)
{
outb(IT8712F_CONFIG_REG_LDN, SIO_BASE);
outb(ldn, SIO_DATA);
outb(value, SIO_DATA);
}
-/* Enable the peripheral devices on the IT8712F Super I/O chip. */
-static void it8712f_enable_serial(device_t dev, unsigned iobase)
+static void it8712f_enter_conf(void)
{
- /* (1) Enter the configuration state (MB PnP mode). */
+ u16 port = 0x2e; /* TODO: Don't hardcode! */
+
+ outb(0x87, port);
+ outb(0x01, port);
+ outb(0x55, port);
+ outb((port == 0x4e) ? 0xaa : 0x55, port);
+}
+
+static void it8712f_exit_conf(void)
+{
+ it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
+}
+
+/* Select 24MHz CLKIN (48MHz is the default). */
+void it8712f_24mhz_clkin(void)
+{
+ it8712f_enter_conf();
+ it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x1);
+ it8712f_exit_conf();
+}
+
+/*
+ * We need to set enable 3VSBSW#, this was documented only in IT8712F_V0.9.2!
+ *
+ * LDN 7, reg 0x2a - needed for S3, or memory power will be cut off.
+ *
+ * Enable 3VSBSW#. (For System Suspend-to-RAM)
+ * 0: 3VSBSW# will be always inactive.
+ * 1: 3VSBSW# enabled. It will be (NOT SUSB#) NAND SUSC#.
+ */
+void it8712f_enable_3vsbsw(void)
+{
+ it8712f_enter_conf();
+ it8712f_sio_write(IT8712F_GPIO, IT8712F_CONFIG_REG_MFC, 0x80);
+ it8712f_exit_conf();
+}
- /* Perform MB PnP setup to put the SIO chip at 0x2e. */
- /* Base address 0x2e: 0x87 0x01 0x55 0x55. */
- /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
- outb(0x87, IT8712F_CONFIGURATION_PORT);
- outb(0x01, IT8712F_CONFIGURATION_PORT);
- outb(0x55, IT8712F_CONFIGURATION_PORT);
- outb(0x55, IT8712F_CONFIGURATION_PORT);
+void it8712f_kill_watchdog(void)
+{
+ it8712f_enter_conf();
+ it8712f_sio_write(IT8712F_GPIO, IT8712F_CONFIG_REG_WATCHDOG, 0x00);
+ it8712f_exit_conf();
+}
+
+/* Enable the serial port(s). */
+void it8712f_enable_serial(device_t dev, u16 iobase)
+{
+ /* (1) Enter the configuration state (MB PnP mode). */
+ it8712f_enter_conf();
/* (2) Modify the data of configuration registers. */
- /* Select the chip to configure (if there's more than one).
- Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
- If this register is not written, both chips are configured. */
+ /*
+ * Select the chip to configure (if there's more than one).
+ * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
+ * If this register is not written, both chips are configured.
+ */
+
/* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */
- /* Enable all devices. */
- it8712f_sio_write(IT8712F_FDC, 0x30, 0x1); /* Floppy */
- it8712f_sio_write(IT8712F_SP1, 0x30, 0x1); /* Serial port 1 */
- it8712f_sio_write(IT8712F_SP2, 0x30, 0x1); /* Serial port 2 */
- it8712f_sio_write(IT8712F_PP, 0x30, 0x1); /* Parallel port */
- it8712f_sio_write(IT8712F_EC, 0x30, 0x1); /* Environment controller */
- it8712f_sio_write(IT8712F_KBCK, 0x30, 0x1); /* Keyboard */
- it8712f_sio_write(IT8712F_KBCM, 0x30, 0x1); /* Mouse */
- it8712f_sio_write(IT8712F_MIDI, 0x30, 0x1); /* MIDI port */
- it8712f_sio_write(IT8712F_GAME, 0x30, 0x1); /* GAME port */
- it8712f_sio_write(IT8712F_IR, 0x30, 0x1); /* Consumer IR */
-
- /* Select 24MHz CLKIN (set bit 0). */
- it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x01);
+ /* Enable serial port(s). */
+ it8712f_sio_write(IT8712F_SP1, 0x30, 0x1); /* Serial port 1 */
+ it8712f_sio_write(IT8712F_SP2, 0x30, 0x1); /* Serial port 2 */
/* Clear software suspend mode (clear bit 0). TODO: Needed? */
/* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_SWSUSP, 0x00); */
/* (3) Exit the configuration state (MB PnP mode). */
- it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
+ it8712f_exit_conf();
}
-