Random ITE Super I/O fixes.

[coreboot.git] / src / superio / ite / it8671f / it8671f_early_serial.c

diff --git a/src/superio/ite/it8671f/it8671f_early_serial.c b/src/superio/ite/it8671f/it8671f_early_serial.c
index 1c30ff572321c24aaa9360bd81c130821dce7f64..68062ec813257b2b4194680e5e27271c8d4b7dac 100644 (file)
--- a/src/superio/ite/it8671f/it8671f_early_serial.c
+++ b/src/superio/ite/it8671f/it8671f_early_serial.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the LinuxBIOS project.
+ * This file is part of the coreboot project.
  *
  * Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
  *
@@ -24,9 +24,9 @@
 /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */
 #define SIO_BASE                   0x3f0
 #define SIO_INDEX                  SIO_BASE
-#define SIO_DATA                   SIO_BASE+1
+#define SIO_DATA                   (SIO_BASE + 1)
 
-/* Global Configuration Registers. */
+/* Global configuration registers. */
 #define IT8671F_CONFIG_REG_CC      0x02   /* Configure Control (write-only). */
 #define IT8671F_CONFIG_REG_LDN     0x07   /* Logical Device Number. */
 #define IT8671F_CONFIG_REG_LDE     0x23   /* PnP Logical Device Enable. */
@@ -34,18 +34,18 @@
 
 #define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */
 
-/* Special values used for entering MB PnP mode. The first four bytes of
- * each line determine the address port, the last four are data. */
-static const uint8_t init_values[] = {
+/*
+ * Special values used for entering MB PnP mode. The first four bytes of
+ * each line determine the address port, the last four are data.
+ */
+static const u8 init_values[] = {
        0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
        0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
        0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
        0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
 };
 
-/* The content of IT8671F_CONFIG_REG_LDN (index 0x07) must be set to the
- * LDN the register belongs to, before you can access the register. */
-static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
+static void it8671f_sio_write(u8 ldn, u8 index, u8 value)
 {
        outb(IT8671F_CONFIG_REG_LDN, SIO_BASE);
        outb(ldn, SIO_DATA);
@@ -53,12 +53,10 @@ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
        outb(value, SIO_DATA);
 }
 
-/* Enable the peripheral devices on the IT8671F Super IO chip. */
-static void it8671f_enable_serial(device_t dev, unsigned iobase)
+/* Enter the configuration state (MB PnP mode). */
+static void it8671f_enter_conf(void)
 {
-       uint8_t i;
-
-       /* (1) Enter the configuration state (MB PnP mode). */
+       int i;
 
        /* Perform MB PnP setup to put the SIO chip at 0x3f0. */
        /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
@@ -70,29 +68,38 @@ static void it8671f_enable_serial(device_t dev, unsigned iobase)
        outb(0x55, IT8671F_CONFIGURATION_PORT);
 
        /* Sequentially write the 32 special values. */
-       for (i = 0; i < 32; i++) {
+       for (i = 0; i < 32; i++)
                outb(init_values[i], SIO_BASE);
-       }
+}
 
-       /* (2) Modify the data of configuration registers. */
+/* Exit the configuration state (MB PnP mode). */
+static void it8671f_exit_conf(void)
+{
+       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02);
+}
 
-       /* Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
-           PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7). */
-       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f);
+/* Select 48MHz CLKIN (24MHz is the default). */
+void it8671f_48mhz_clkin(void)
+{
+       it8671f_enter_conf();
+       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, (1 << 6));
+       it8671f_exit_conf();
+}
+
+/* Enable the serial port(s). */
+static void it8671f_enable_serial(device_t dev, u16 iobase)
+{
+       it8671f_enter_conf();
 
-       /* Activate all devices. */  
-       it8671f_sio_write(IT8671F_FDC,  0x30, 0x01); /* Floppy */
-       it8671f_sio_write(IT8671F_SP1,  0x30, 0x01); /* Serial port 1 */
-       it8671f_sio_write(IT8671F_SP2,  0x30, 0x01); /* Serial port 2 */
-       it8671f_sio_write(IT8671F_PP,   0x30, 0x01); /* Parallel port */
-       it8671f_sio_write(IT8671F_KBCK, 0x30, 0x01); /* Keyboard */
-       it8671f_sio_write(IT8671F_KBCM, 0x30, 0x01); /* Mouse */
+       /*
+        * Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2),
+         * PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7).
+        */
+       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f);
 
-       /* Select 24MHz CLKIN (clear bit 6) and clear software suspend
-          mode (clear bit 0). */
-       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00);
+       /* Enable serial port(s). */
+       it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */
+       it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */
 
-       /* (3) Exit the configuration state (MB PnP mode). */
-       it8671f_sio_write(0x00, IT8671F_CONFIG_REG_CC, 0x02); 
+       it8671f_exit_conf();
 }
-