Fix the build. This error was introduced by change in acpi.c, the acpi_slp_type exist...

[coreboot.git] / src / southbridge / via / vt8237r / vt8237r_lpc.c

diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index e67e5cbb41f47594f753ea650b582aa7832c2300..66cb3de77b4a9da285b4ed89956c466677ce5809 100644 (file)
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -26,6 +26,8 @@
 #include <device/pci_ids.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
+#include <pc80/keyboard.h>
+#include <pc80/i8259.h>
 #include <stdlib.h>
 #include "vt8237r.h"
 #include "chip.h"
@@ -55,7 +57,7 @@ static struct ioapicreg {
        /* IO-APIC virtual wire mode configuration. */
        /* mask, trigger, polarity, destination, delivery, vector */
        {0, ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST |
-                   ExtINT, NONE}, {
+                   ExtINT, NONE},
        {1,  DISABLED, NONE},
        {2,  DISABLED, NONE},
        {3,  DISABLED, NONE},
@@ -147,8 +149,13 @@ static void pci_routing_fixup(struct device *dev)
  * Set up the power management capabilities directly into ACPI mode.
  * This avoids having to handle any System Management Interrupts (SMIs).
  */
+
+extern u8 acpi_slp_type;
+
+
 static void setup_pm(device_t dev)
 {
+       u16 tmp;
        /* Debounce LID and PWRBTN# Inputs for 16ms. */
        pci_write_config8(dev, 0x80, 0x20);
 
@@ -169,10 +176,10 @@ static void setup_pm(device_t dev)
 
        /*
         * 7 = SMBus clock from RTC 32.768KHz
-        * 5 = Internal PLL reset from susp
-        * 2 = GPO2 is GPIO
+        * 5 = Internal PLL reset from susp disabled
+        * 2 = GPO2 is SUSA#
         */
-       pci_write_config8(dev, 0x94, 0xa4);
+       pci_write_config8(dev, 0x94, 0xa0);
 
        /*
         * 7 = stp to sust delay 1msec
@@ -217,7 +224,19 @@ static void setup_pm(device_t dev)
        outb(0x0, VT8237R_ACPI_IO_BASE + 0x42);
 
        /* SCI is generated for RTC/pwrBtn/slpBtn. */
-       outw(0x001, VT8237R_ACPI_IO_BASE + 0x04);
+       tmp = inw(VT8237R_ACPI_IO_BASE + 0x04);
+#if HAVE_ACPI_RESUME == 1
+       acpi_slp_type = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0 ;
+       printk_debug("SLP_TYP type was %x %x\n", tmp, acpi_slp_type);
+#endif
+       /* clear sleep */
+       tmp &= ~(7 << 10);
+       tmp |= 1;
+       outw(tmp, VT8237R_ACPI_IO_BASE + 0x04);
+
+
+
+
 }
 
 static void vt8237r_init(struct device *dev)
@@ -264,14 +283,10 @@ static void vt8237s_init(struct device *dev)
        pci_write_config32(dev, 0xbc,
                           (VT8237S_SPI_MEM_BASE >> 8) | (tmp & 0xFF000000));
 
-       /* Enable SATA LED, VR timer = 100us, VR timer should be fixed. */
-       pci_write_config8(dev, 0xe5, 0x69);
-
        /*
         * REQ5 as PCI request input - should be together with INTE-INTH. 
-        * Fast VR timer disable - need for LDTSTOP_L signal.
         */
-       pci_write_config8(dev, 0xe4, 0xa5);
+       pci_write_config8(dev, 0xe4, 0x04);
 
        /* Reduce further the STPCLK/LDTSTP signal to 5us. */
        pci_write_config8(dev, 0xec, 0x4);