Various license header consistency fixes (trivial).
[coreboot.git] / src / southbridge / via / k8t890 / k8t890_host.c
index 2ab16f58a2876480aa3b7cb70e95cf677e51dfa0..f0e2b06c8d4a70b42264eb4d420f44ece02371c2 100644 (file)
@@ -4,8 +4,8 @@
  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  *
  * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License v2 as published by
- * the Free Software Foundation.
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -28,9 +28,32 @@ static void host_enable(struct device *dev)
 {
        /* Multiple function control */
        pci_write_config8(dev, K8T890_MULTIPLE_FN_EN, 0x01);
+
+}
+
+
+static void host_init(struct device *dev)
+{
+       u8 reg;
+
+       /* AGP Capability Header Control */
+       reg = pci_read_config8(dev, 0x4d);
+       reg |= 0x20; /* GART access enabled by either D0F0 Rx90[8] or D1F0 Rx90[8] */
+       pci_write_config8(dev, 0x4d, reg);
+
+       /* GD Output Stagger Delay */
+       reg = pci_read_config8(dev, 0x42);
+       reg |= 0x10; /* AD[31:16] with 1ns */
+       pci_write_config8(dev, 0x42, reg);
+
+       /* AGP Control */
+       reg = pci_read_config8(dev, 0xbc);
+       reg |= 0x20; /* AGP Read Snoop DRAM Post-Write Buffer */
+       pci_write_config8(dev, 0xbc, reg);
+
 }
 
-static const struct device_operations host_ops = {
+static const struct device_operations host_ops_t = {
        .read_resources         = pci_dev_read_resources,
        .set_resources          = pci_dev_set_resources,
        .enable_resources       = pci_dev_enable_resources,
@@ -38,8 +61,23 @@ static const struct device_operations host_ops = {
        .ops_pci                = 0,
 };
 
-static const struct pci_driver northbridge_driver __pci_driver = {
-       .ops    = &host_ops,
+static const struct device_operations host_ops_m = {
+       .read_resources         = pci_dev_read_resources,
+       .set_resources          = pci_dev_set_resources,
+       .enable_resources       = pci_dev_enable_resources,
+       .enable                 = host_enable,
+       .init                   = host_init,
+       .ops_pci                = 0,
+};
+
+static const struct pci_driver northbridge_driver_t __pci_driver = {
+       .ops    = &host_ops_t,
        .vendor = PCI_VENDOR_ID_VIA,
        .device = PCI_DEVICE_ID_VIA_K8T890CE_0,
 };
+
+static const struct pci_driver northbridge_driver_m __pci_driver = {
+       .ops    = &host_ops_m,
+       .vendor = PCI_VENDOR_ID_VIA,
+       .device = PCI_DEVICE_ID_VIA_K8M890CE_0,
+};