Following patch changes the K8M890 VGA handling. It reverts the framebuffer size

[coreboot.git] / src / southbridge / via / k8t890 / k8t890_dram.c

diff --git a/src/southbridge/via/k8t890/k8t890_dram.c b/src/southbridge/via/k8t890/k8t890_dram.c
index 38074220ae912cba2afd4837a6b5463e3a2dec05..4f99fec1554657feb267c6fc4729abc7eb5e21d2 100644 (file)
--- a/src/southbridge/via/k8t890/k8t890_dram.c
+++ b/src/southbridge/via/k8t890/k8t890_dram.c
@@ -4,8 +4,8 @@
  * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
  *
  * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License v2 as published by
- * the Free Software Foundation.
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -23,6 +23,9 @@
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
+#include <pc80/mc146818rtc.h>
+#include <bitops.h>
+#include "k8t890.h"
 
 static void dram_enable(struct device *dev)
 {
@@ -59,10 +62,92 @@ static void dram_enable(struct device *dev)
        reg = pci_read_config16(dev, 0x88);
        reg &= 0xf800;
 
+       /* The Address Next to the Last Valid DRAM Address */
        pci_write_config16(dev, 0x88, (msr.lo >> 24) | reg);
+
+}
+
+#if CONFIG_GFXUMA
+extern uint64_t uma_memory_base, uma_memory_size;
+#endif
+
+static void dram_enable_k8m890(struct device *dev)
+{
+#if CONFIG_GFXUMA
+       msr_t msr;
+       int ret;
+       unsigned int fbbits;
+
+       /* use CMOS */
+       if (CONFIG_VIDEO_MB == -1) {
+               ret = get_option(&fbbits, "videoram_size");
+               if (ret) {
+                       printk(BIOS_WARNING, "Failed to get videoram size (error %d), using default.\n", ret);
+                       fbbits = 5;
+               }
+
+               if ((fbbits < 1) || (fbbits > 7)) {
+                       printk(BIOS_WARNING, "Invalid videoram size (%d), using default.\n",
+                                      4 << fbbits);
+                       fbbits = 5;
+       }
+               uma_memory_size = 4 << (fbbits + 20);
+       } else {
+               uma_memory_size = (CONFIG_VIDEO_MB << 20);
+       }
+
+       msr = rdmsr(TOP_MEM);
+       uma_memory_base = msr.lo - uma_memory_size;
+       printk(BIOS_INFO, "K8M890: UMA base is %llx size is %d (MB)\n", uma_memory_base, uma_memory_size / 1024 / 1024);
+       /* enable VGA, so the bridges gets VGA_EN and resources are set */
+       pci_write_config8(dev, 0xa1, 0x80);
+#endif
+       dram_enable(dev);
+}
+
+int
+k8m890_host_fb_size_get(void)
+{
+       struct device *dev = dev_find_device(PCI_VENDOR_ID_VIA,
+                                            PCI_DEVICE_ID_VIA_K8M890CE_3, 0);
+       unsigned char tmp;
+
+       tmp = pci_read_config8(dev, 0xA1);
+       tmp >>= 4;
+       if (tmp & 0x08)
+               return 4 << (tmp & 7);
+       else
+               return 0;
 }
 
-static const struct device_operations dram_ops = {
+static void dram_init_fb(struct device *dev)
+{
+#if CONFIG_GFXUMA
+       /* Important bits:
+        * Enable the internal GFX bit 7 of reg 0xa1 plus in same reg:
+        * bits 6:4 X fbuffer size will be  2^(X+2) or 100 = 64MB, 101 = 128MB
+        * bits 3:0 BASE [31:28]
+        * reg 0xa0 bits 7:1 BASE [27:21] bit0 enable CPU access
+        */
+       unsigned int fbbits = 0;
+       u8 tmp;
+       int ret;
+
+       fbbits = ((log2(uma_memory_size >> 20) - 2) << 4);
+       printk(BIOS_INFO, "K8M890: Using a %dMB framebuffer.\n", (unsigned int) (uma_memory_size >> 20));
+
+       /* Step 1: enable UMA but no FB */
+       pci_write_config8(dev, 0xa1, 0x80);
+
+       /* Step 2: enough is just the FB size, the CPU accessible address is not needed */
+       tmp = fbbits | 0x80;
+       pci_write_config8(dev, 0xa1, tmp);
+
+       /* TODO K8 needs some UMA fine tuning too maybe call some generic routine here? */
+#endif
+}
+
+static const struct device_operations dram_ops_t = {
        .read_resources         = pci_dev_read_resources,
        .set_resources          = pci_dev_set_resources,
        .enable_resources       = pci_dev_enable_resources,
@@ -70,8 +155,23 @@ static const struct device_operations dram_ops = {
        .ops_pci                = 0,
 };
 
-static const struct pci_driver northbridge_driver __pci_driver = {
-       .ops    = &dram_ops,
+static const struct device_operations dram_ops_m = {
+       .read_resources         = pci_dev_read_resources,
+       .set_resources          = pci_dev_set_resources,
+       .enable_resources       = pci_dev_enable_resources,
+       .enable                 = dram_enable_k8m890,
+       .init                   = dram_init_fb,
+       .ops_pci                = 0,
+};
+
+static const struct pci_driver northbridge_driver_t __pci_driver = {
+       .ops    = &dram_ops_t,
        .vendor = PCI_VENDOR_ID_VIA,
        .device = PCI_DEVICE_ID_VIA_K8T890CE_3,
 };
+
+static const struct pci_driver northbridge_driver_m __pci_driver = {
+       .ops    = &dram_ops_m,
+       .vendor = PCI_VENDOR_ID_VIA,
+       .device = PCI_DEVICE_ID_VIA_K8M890CE_3,
+};