intel/sch: Move HAVE_HARD_RESET to southbridge

[coreboot.git] / src / southbridge / intel / sch / Kconfig

diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig
index 525db06dc5b74587bc48c036d79b62252b34a1ae..83ff447f3edf4e79c3a6ff1310a5f65725c8c555 100644 (file)
--- a/src/southbridge/intel/sch/Kconfig
+++ b/src/southbridge/intel/sch/Kconfig
@@ -19,14 +19,34 @@
 
 config SOUTHBRIDGE_INTEL_SCH
        bool
-       select TINY_BOOTBLOCK
        select HAVE_USBDEBUG
+       select HAVE_HARD_RESET
+
+if SOUTHBRIDGE_INTEL_SCH
 
 config EHCI_BAR
        hex
-       default 0xfef00000 if SOUTHBRIDGE_INTEL_SCH
+       default 0xfef00000
 
 config EHCI_DEBUG_OFFSET
        hex
-       default 0xa0 if SOUTHBRIDGE_INTEL_SCH
+       default 0xa0
+
+config HAVE_CMC
+       bool "Add a CMC state machine binary"
+       help
+         Select this option to add a CMC state machine binary to
+         the resulting coreboot image.
+
+         Note: Without this binary coreboot will not work
+
+config CMC_FILE
+       string "Intel CMC path and filename"
+       depends on HAVE_CMC
+       default "cmc.bin"
+       help
+         The path and filename of the file to use as CMC state machine
+         binary.
+
+endif