printk_foo -> printk(BIOS_FOO, ...)
[coreboot.git] / src / southbridge / intel / i82801gx / i82801gx_smbus.c
index 3345864ce7afe803d645ab3c28d7fa6b54da56df..50c6d0f342ebfe71741735e84b98ace44b2f2468 100644 (file)
@@ -1,12 +1,12 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2008 coresystems GmbH
+ * Copyright (C) 2008-2009 coresystems GmbH
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#include <stdint.h>
-#include <smbus.h>
-#include <pci.h>
-#include <pci_ids.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/smbus.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <device/pci_ops.h>
 #include <arch/io.h>
 #include "i82801gx.h"
-#include "i82801_smbus.h"
+#include "i82801gx_smbus.h"
 
-static int smbus_read_byte(struct bus *bus, device_t dev, u8 address)
+#define SMB_BASE 0x20
+static void smbus_init(struct device *dev)
+{
+       u32 smb_base;
+
+       smb_base = pci_read_config32(dev, SMB_BASE);
+       printk(BIOS_DEBUG, "Initializing SMBus device:\n");
+       printk(BIOS_DEBUG, "  Old SMBUS Base Address: 0x%04x\n", smb_base);
+       pci_write_config32(dev, SMB_BASE, 0x00000401);
+       smb_base = pci_read_config32(dev, SMB_BASE);
+       printk(BIOS_DEBUG, "  New SMBUS Base Address: 0x%04x\n", smb_base);
+}
+
+static int lsmbus_read_byte(device_t dev, u8 address)
 {
        u16 device;
        struct resource *res;
+       struct bus *pbus;
 
-       device = dev->path.u.i2c.device;
-       res = find_resource(bus->dev, 0x20);
+       device = dev->path.i2c.device;
+       pbus = get_pbus_smbus(dev);
+       res = find_resource(pbus->dev, 0x20);
 
        return do_smbus_read_byte(res->base, device, address);
 }
 
 static struct smbus_bus_operations lops_smbus_bus = {
-       .read_byte      = smbus_read_byte,
+       .read_byte      = lsmbus_read_byte,
+};
+
+static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+{
+       if (!vendor || !device) {
+               pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
+                               pci_read_config32(dev, PCI_VENDOR_ID));
+       } else {
+               pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
+                               ((device & 0xffff) << 16) | (vendor & 0xffff));
+       }
+}
+
+static struct pci_operations smbus_pci_ops = {
+       .set_subsystem    = smbus_set_subsystem,
 };
 
 static struct device_operations smbus_ops = {
        .read_resources         = pci_dev_read_resources,
        .set_resources          = pci_dev_set_resources,
        .enable_resources       = pci_dev_enable_resources,
-       .init                   = 0,
+       .init                   = smbus_init,
        .scan_bus               = scan_static_bus,
        .enable                 = i82801gx_enable,
        .ops_smbus_bus          = &lops_smbus_bus,
+       .ops_pci                = &smbus_pci_ops,
 };
 
 /* 82801GB/GR/GDH/GBM/GHM/GU (ICH7/ICH7R/ICH7DH/ICH7-M/ICH7-M DH/ICH7-U) */
 static const struct pci_driver i82801gx_smbus __pci_driver = {
        .ops    = &smbus_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
-       .device = PCI_DEVICE_ID_INTEL_82801GB_SMB,
+       .device = 0x27da,
 };