no warnings days.

[coreboot.git] / src / southbridge / intel / i82801cx / i82801cx.h

diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index 4cb215efbb1ff3d611d26bf561c1b238e88206d6..ea7d858d14ec13b0ad32343e02df431d6647fd58 100644 (file)
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -2,8 +2,10 @@
 #define I82801CX_H
 
 #if !defined(__PRE_RAM__)
+#include <device/device.h>
 #include "chip.h"
-extern void i82801cx_enable(device_t dev);
+void i82801cx_enable(device_t dev);
+void i82801cx_hard_reset(void);
 #endif