printk_foo -> printk(BIOS_FOO, ...)

[coreboot.git] / src / southbridge / intel / i3100 / i3100_lpc.c

diff --git a/src/southbridge/intel/i3100/i3100_lpc.c b/src/southbridge/intel/i3100/i3100_lpc.c
index f8584cadb05146714b16e7e9e42d7ef00b3cea24..4612c916d2651d8c7e66647face131832442938e 100644 (file)
--- a/src/southbridge/intel/i3100/i3100_lpc.c
+++ b/src/southbridge/intel/i3100/i3100_lpc.c
@@ -29,6 +29,7 @@
 #include <pc80/mc146818rtc.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
+#include <arch/ioapic.h>
 #include "i3100.h"
 
 #define ACPI_BAR 0x40
@@ -49,60 +50,6 @@
 #define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
-#define ALL            (0xff << 24)
-#define NONE           (0)
-#define DISABLED       (1 << 16)
-#define ENABLED                (0 << 16)
-#define TRIGGER_EDGE   (0 << 15)
-#define TRIGGER_LEVEL  (1 << 15)
-#define POLARITY_HIGH  (0 << 13)
-#define POLARITY_LOW   (1 << 13)
-#define PHYSICAL_DEST  (0 << 11)
-#define LOGICAL_DEST   (1 << 11)
-#define ExtINT         (7 << 8)
-#define NMI            (4 << 8)
-#define SMI            (2 << 8)
-#define INT            (1 << 8)
-
-static void setup_ioapic(device_t dev)
-{
-       int i;
-       u32 value_low, value_high;
-       u32 ioapic_base = 0xfec00000;
-       volatile u32 *l;
-       u32 interrupts;
-       struct resource *res;
-
-       /* Enable IO APIC */
-       res = find_resource(dev, RCBA);
-       if (!res) {
-               return;
-       }
-       *((u8 *)(res->base + 0x31ff)) |= (1 << 0);
-
-       l = (u32 *) ioapic_base;
-
-       l[0] = 0x01;
-       interrupts = (l[04] >> 16) & 0xff;
-       for (i = 0; i < interrupts; i++) {
-               l[0] = (i * 2) + 0x10;
-               l[4] = DISABLED;
-               value_low = l[4];
-               l[0] = (i * 2) + 0x11;
-               l[4] = NONE; /* Should this be an address? */
-               value_high = l[4];
-               if (value_low == 0xffffffff) {
-                       printk_warning("%d IO APIC not responding.\n",
-                               dev_path(dev));
-                       return;
-               }
-       }
-
-       /* Put the APIC in virtual wire mode */
-       l[0] = 0x12;
-       l[4] = ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT;
-}
-
 static void i3100_enable_serial_irqs(device_t dev)
 {
        /* set packet length and toggle silent mode bit */
@@ -285,7 +232,7 @@ static void i3100_power_options(device_t dev) {
   /* minimum asssertion is 1 to 2 RTCCLK */
   reg8 &= ~(1 << 3);   
   pci_write_config8(dev, GEN_PMCON_3, reg8);
-  printk_info("set power %s after power fail\n", pwr_on ? "on" : "off");  
+  printk(BIOS_INFO, "set power %s after power fail\n", pwr_on ? "on" : "off");  
 
   /* Set up NMI on errors. */
   reg8 = inb(0x61);
@@ -304,11 +251,11 @@ static void i3100_power_options(device_t dev) {
   get_option(&nmi_option, "nmi");
   if (nmi_option) {
     /* Set NMI. */
-    printk_info ("NMI sources enabled.\n");
+    printk(BIOS_INFO, "NMI sources enabled.\n");
     reg8 &= ~(1 << 7); 
   } else {
     /* Can't mask NMI from PCI-E and NMI_NOW */
-    printk_info ("NMI sources disabled.\n");
+    printk(BIOS_INFO, "NMI sources disabled.\n");
     reg8 |= ( 1 << 7);
   }
   outb(reg8, 0x70);
@@ -363,7 +310,19 @@ static void i3100_gpio_init(device_t dev)
 
 static void lpc_init(struct device *dev)
 {
-       setup_ioapic(dev);
+       struct resource *res;
+
+       /* Enable IO APIC */
+       res = find_resource(dev, RCBA);
+       if (!res) {
+               return;
+       }
+       *((u8 *)(res->base + 0x31ff)) |= (1 << 0);
+
+       // TODO this code sets int 0 of the IOAPIC in Virtual Wire Mode
+       // (register 0x10/0x11) while the old code used int 1 (register 0x12)
+       // ... Why? 
+       setup_ioapic(IO_APIC_ADDR, 0); // Don't rename IOAPIC ID
 
        /* Decode 0xffc00000 - 0xffffffff to fwh idsel 0 */
        pci_write_config32(dev, 0xd0, 0x00000000);
@@ -399,12 +358,23 @@ static void i3100_lpc_read_resources(device_t dev)
        /* Add the GPIO BAR */
        res = pci_get_resource(dev, GPIO_BAR);
 
-       /* Add an extra subtractive resource for both memory and I/O */
+       /* Add an extra subtractive resource for both memory and I/O. */
        res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-       res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+       res->base = 0;
+       res->size = 0x1000;
+       res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
+                    IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
        res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-       res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
+       res->base = 0xff800000;
+       res->size = 0x00800000; /* 8 MB for flash */
+       res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
+                    IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
+       res = new_resource(dev, 3); /* IOAPIC */
+       res->base = 0xfec00000;
+       res->size = 0x00001000;
+       res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 
        /* Add resource for RCBA */
        res = new_resource(dev, RCBA);
@@ -452,13 +422,13 @@ static struct device_operations lpc_ops  = {
        .ops_pci          = &lops_pci,
 };
 
-static struct pci_driver lpc_driver __pci_driver = {
+static const struct pci_driver lpc_driver __pci_driver = {
        .ops    = &lpc_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = PCI_DEVICE_ID_INTEL_3100_LPC,
 };
 
-static struct pci_driver lpc_driver_ep80579 __pci_driver = {
+static const struct pci_driver lpc_driver_ep80579 __pci_driver = {
        .ops    = &lpc_ops,
        .vendor = PCI_VENDOR_ID_INTEL,
        .device = PCI_DEVICE_ID_INTEL_EP80579_LPC,