Move MMCONF resource into the domain for fam10 for the resource allocator.

[coreboot.git] / src / southbridge / intel / esb6300 / esb6300_ehci.c

diff --git a/src/southbridge/intel/esb6300/esb6300_ehci.c b/src/southbridge/intel/esb6300/esb6300_ehci.c
index 313504866e8151b6b7ee4f10186ca37bb75613c3..c103c4bd2f296911da2e6d0ebb8f43b45ab23d16 100644 (file)
--- a/src/southbridge/intel/esb6300/esb6300_ehci.c
+++ b/src/southbridge/intel/esb6300/esb6300_ehci.c
@@ -9,12 +9,12 @@ static void ehci_init(struct device *dev)
 {
        uint32_t cmd;
 
-       printk_debug("EHCI: Setting up controller.. ");
+       printk(BIOS_DEBUG, "EHCI: Setting up controller.. ");
        cmd = pci_read_config32(dev, PCI_COMMAND);
-       pci_write_config32(dev, PCI_COMMAND, 
+       pci_write_config32(dev, PCI_COMMAND,
                cmd | PCI_COMMAND_MASTER);
 
-       printk_debug("done.\n");
+       printk(BIOS_DEBUG, "done.\n");
 }
 
 static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -24,7 +24,7 @@ static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
        /* Enable writes to protected registers */
        pci_write_config8(dev, 0x80, access_cntl | 1);
        /* Write the subsystem vendor and device id */
-       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
+       pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
                ((device & 0xffff) << 16) | (vendor & 0xffff));
        /* Restore protection */
        pci_write_config8(dev, 0x80, access_cntl);