Add more missing GPL-headers, fix inconsistencies in others.

[coreboot.git] / src / southbridge / broadcom / bcm5785 / bcm5785_reset.c

diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_reset.c b/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
index b6fc5926b3b8592a17aa4efd5c99061ea1e36983..a59b23992e6f0756d3a4cd0e046418edc3d96e3e 100644 (file)
--- a/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_reset.c
@@ -1,9 +1,25 @@
 /*
- * Copyright  2005 AMD
- *  by yinghai.lu@amd.com
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2005 AMD
+ * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
 #include <arch/io.h>
+#include <reset.h>
 
 #define PCI_DEV(BUS, DEV, FN) ( \
         (((BUS) & 0xFFF) << 20) | \
@@ -38,4 +54,3 @@ void hard_reset(void)
        outb((0 <<3)|(0<<2)|(1<<1), 0xcf9);
        outb((0 <<3)|(1<<2)|(1<<1), 0xcf9);
 }
-