printk_foo -> printk(BIOS_FOO, ...)

[coreboot.git] / src / southbridge / amd / cs5535 / cs5535.c

diff --git a/src/southbridge/amd/cs5535/cs5535.c b/src/southbridge/amd/cs5535/cs5535.c
index d1ec056a89269eb8cda72f5b04abb6d118824cbe..6f203558e37805c154e9434cb1ae66a1cc9a2ef6 100644 (file)
--- a/src/southbridge/amd/cs5535/cs5535.c
+++ b/src/southbridge/amd/cs5535/cs5535.c
@@ -39,14 +39,14 @@ static void nvram_on(struct device *dev)
 
        *flash = 0xf0;
 
-       printk_debug("Flash device: MFGID %02x, DEVID %02x\n", id1, id2);
+       printk(BIOS_DEBUG, "Flash device: MFGID %02x, DEVID %02x\n", id1, id2);
 #endif
 }
 
        
 static void southbridge_init(struct device *dev)
 {
-       printk_spew("cs5535: %s\n", __func__);
+       printk(BIOS_SPEW, "cs5535: %s\n", __func__);
        nvram_on(dev);
 }
 
@@ -56,28 +56,46 @@ static void dump_south(struct device *dev)
        int i, j;
 
        for(i=0; i<256; i+=16) {
-               printk_debug("0x%02x: ", i);
+               printk(BIOS_DEBUG, "0x%02x: ", i);
                for(j=0; j<16; j++)
-                       printk_debug("%02x ", pci_read_config8(dev, i+j));
-               printk_debug("\n");
+                       printk(BIOS_DEBUG, "%02x ", pci_read_config8(dev, i+j));
+               printk(BIOS_DEBUG, "\n");
        }
 }
 */
 
 static void southbridge_enable(struct device *dev)
 {
-       printk_spew("%s: dev is %p\n", __func__, dev);
+       printk(BIOS_SPEW, "%s: dev is %p\n", __func__, dev);
+}
+
+static void cs5535_read_resources(device_t dev)
+{
+       struct resource* res;
+
+       pci_dev_read_resources(dev);
+
+       res = new_resource(dev, 1);
+       res->base = 0x0UL;
+       res->size = 0x400UL;
+       res->limit = 0xffffUL;
+       res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
+
+       res = new_resource(dev, 3); /* IOAPIC */
+       res->base = 0xfec00000;
+       res->size = 0x00001000;
+       res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 }
 
 static void cs5535_pci_dev_enable_resources(device_t dev)
 {
-       printk_spew("cs5535.c: %s()\n", __func__);
+       printk(BIOS_SPEW, "cs5535.c: %s()\n", __func__);
        pci_dev_enable_resources(dev);
        enable_childrens_resources(dev);
 }
 
 static struct device_operations southbridge_ops = {
-       .read_resources   = pci_dev_read_resources,
+       .read_resources   = cs5535_read_resources,
        .set_resources    = pci_dev_set_resources,
        .enable_resources = cs5535_pci_dev_enable_resources,
        .init             = southbridge_init,
@@ -90,3 +108,11 @@ static const struct pci_driver cs5535_pci_driver __pci_driver = {
        .vendor = PCI_VENDOR_ID_NS,
        .device = PCI_DEVICE_ID_NS_CS5535
 };
+
+struct chip_operations southbridge_amd_cs5535_ops = {
+        CHIP_NAME("AMD Geode CS5535 Southbridge")
+            /* This is only called when this device is listed in the
+             * static device tree.
+             */
+            .enable_dev = southbridge_enable,
+};