Please bear with me - another rename checkin. This qualifies as trivial, no

[coreboot.git] / src / southbridge / amd / cs5530 / cs5530.c

diff --git a/src/southbridge/amd/cs5530/cs5530.c b/src/southbridge/amd/cs5530/cs5530.c
index f70918e56619c446e6328c828b87d545f7e5b153..26ec1f7386a648a14780e4bceecd7a50e5327db5 100644 (file)
--- a/src/southbridge/amd/cs5530/cs5530.c
+++ b/src/southbridge/amd/cs5530/cs5530.c
@@ -1,92 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ */
+
+/* Datasheet:
+ *   - Name: Geode CS5530A I/O Companion Multi-Function South Bridge
+ *   - URL: http://www.national.com/pf/CS/CS5530A.html
+ *   - PDF: http://www.national.com/ds.cgi/CS/CS5530A.pdf
+ *   - Revision: 1.1 (May 2001)
+ */
+
+/* Datasheet:
+ *   - Name: AMD Geode CS5530A Companion Device Data Book
+ *   - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html
+ *   - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530a_db_v11.pdf
+ *   - Date: October 2003
+ *   - Publication ID: May 2001, Revision 1.1
+ */
+
+/* Datasheet:
+ *   - Name: AMD Geode Solutions
+ *           Integrated Processors, Companion Devices, and System Platforms
+ *           (Geode CS5530 I/O Companion Multi-Function South Bridge)
+ *   - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html
+ *   - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530_db_v41.pdf
+ *   - Date: September 2004
+ */
+
+/* Note: The CS3350 / CS3350A are mostly identical. This code handles both. */
 
-#include <arch/io.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
-#include <device/pci_ops.h>
-#include <device/pci_ids.h>
-#include <console/console.h>
 #include "cs5530.h"
 
-static void nvram_on(struct device *dev)
-{
-#if 0
-       volatile char *flash = (volatile unsigned char *)0xFFFc0000;
-       unsigned char id1, id2;
-#endif
-       unsigned char reg;
-
-       /* Enable writes to flash at top of memory */
-       pci_write_config8(dev, 0x52, 0xee);
-
-       /* Set positive decode on ROM */
-       /* Also, there is no apparent reason to turn off the devoce on the */
-       /* IDE devices */
-       
-       reg = pci_read_config8(dev, 0x5b);
-       reg |= 1 << 5;  /* ROM Decode */
-       reg |= 1 << 3;  /* Primary IDE decode */
-       reg |= 1 << 4;  /* Secondary IDE decode */
-
-       pci_write_config8(dev, 0x5b, reg);
-
-#if 0          // just to test if the flash is accessible!
-       *(flash + 0x555) = 0xaa;
-       *(flash + 0x2aa) = 0x55;
-       *(flash + 0x555) = 0x90;
-
-       id1 = *(volatile unsigned char *) flash;
-       id2 = *(volatile unsigned char *) (flash + 1);
-
-       *flash = 0xf0;
-
-       printk_debug("Flash device: MFGID %02x, DEVID %02x\n", id1, id2);
-#endif
-}
-
-       
-static void southbridge_init(struct device *dev)
+void cs5530_enable(device_t dev)
 {
-       printk_spew("cs5530: %s\n", __FUNCTION__);
-       nvram_on(dev);
 }
 
-/*
-static void dump_south(struct device *dev)
-{
-       int i, j;
-
-       for(i=0; i<256; i+=16) {
-               printk_debug("0x%02x: ", i);
-               for(j=0; j<16; j++)
-                       printk_debug("%02x ", pci_read_config8(dev, i+j));
-               printk_debug("\n");
-       }
-}
-*/
-
-static void southbridge_enable(struct device *dev)
-{
-       printk_spew("%s: dev is %p\n", __FUNCTION__, dev);
-}
-
-static void cs5530_pci_dev_enable_resources(device_t dev)
-{
-       printk_spew("cs5530.c: %s()\n", __FUNCTION__);
-       pci_dev_enable_resources(dev);
-       enable_childrens_resources(dev);
-}
-
-static struct device_operations southbridge_ops = {
-       .read_resources   = pci_dev_read_resources,
-       .set_resources    = pci_dev_set_resources,
-       .enable_resources = cs5530_pci_dev_enable_resources,
-       .init             = southbridge_init,
-       .enable           = southbridge_enable,
-       .scan_bus         = scan_static_bus,
-};
-
-static struct pci_driver cs5530_pci_driver __pci_driver = {
-       .ops    = &southbridge_ops,
-       .vendor = PCI_VENDOR_ID_CYRIX,
-       .device = PCI_DEVICE_ID_CYRIX_5530_LEGACY,
+struct chip_operations southbridge_amd_cs5530_ops = {
+       CHIP_NAME("AMD Geode CS5530/CS5530A I/O Companion Southbridge")
+       .enable_dev = cs5530_enable,
 };