* ***************************************************************************
*
*/
-
+
#ifndef _AMD_SBPLATFORM_H_
#define _AMD_SBPLATFORM_H_
*/
#define SB_CIMx_PARAMETER 0x02
-// Generic
+// Generic
#define cimSpreadSpectrumDefault TRUE
#define cimSpreadSpectrumTypeDefault 0x00 // Normal
#define cimHpetTimerDefault TRUE
#define cimSpiFastReadEnableDefault 0x01 // Enable
#define cimSpiFastReadSpeedDefault 0x01 // 33 MHz
#define cimSioHwmPortEnableDefault FALSE
-// GPP/AB Controller
+// GPP/AB Controller
#define cimNbSbGen2Default TRUE
#define cimAlinkPhyPllPowerDownDefault TRUE
#define cimResetCpuOnSyncFloodDefault TRUE
#define cimGppMemWrImproveDefault TRUE
#define cimGppPortAspmDefault FALSE
#define cimGppLaneReversalDefault FALSE
-#define cimGppPhyPllPowerDownDefault TRUE
+#define cimGppPhyPllPowerDownDefault TRUE
// USB Controller
#define cimUsbPhyPowerDownDefault FALSE
// GEC Controller
#define cimSBGecDebugBusDefault FALSE
#define cimSBGecPwrDefault 0x03
-// Sata Controller
+// Sata Controller
#define cimSataSetMaxGen2Default 0x00
#define cimSATARefClkSelDefault 0x10
#define cimSATARefDivSelDefault 0x80
#define cimSataPortMultCapDefault TRUE
#define cimSataPscCapDefault 0x00 // Enable
#define cimSataSscCapDefault 0x00 // Enable
-#define cimSataFisBasedSwitchingDefault FALSE
+#define cimSataFisBasedSwitchingDefault FALSE
#define cimSataCccSupportDefault FALSE
#define cimSataClkAutoOffDefault FALSE
#define cimNativepciesupportDefault FALSE
-// Fusion Related
+// Fusion Related
#define cimAcDcMsgDefault FALSE
#define cimTimerTickTrackDefault FALSE
#define cimClockInterruptTagDefault FALSE