printk_foo -> printk(BIOS_FOO, ...)

[coreboot.git] / src / southbridge / amd / amd8111 / amd8111_acpi.c

diff --git a/src/southbridge/amd/amd8111/amd8111_acpi.c b/src/southbridge/amd/amd8111/amd8111_acpi.c
index f661ab478e89c4ca985f608849450dc340823324..32e3808a984c968158b35b72e4f7887510fb25e0 100644 (file)
--- a/src/southbridge/amd/amd8111/amd8111_acpi.c
+++ b/src/southbridge/amd/amd8111/amd8111_acpi.c
@@ -16,8 +16,8 @@
 #define SLOW_CPU_OFF 0
 #define SLOW_CPU__ON 1
 
-#ifndef MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
 #endif
 
 
@@ -26,7 +26,7 @@ static int lsmbus_recv_byte(device_t dev)
        unsigned device;
        struct resource *res;
 
-       device = dev->path.u.i2c.device;
+       device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
        
        return do_smbus_recv_byte(res->base, device);
@@ -37,7 +37,7 @@ static int lsmbus_send_byte(device_t dev, uint8_t val)
        unsigned device;
        struct resource *res;
 
-       device = dev->path.u.i2c.device;
+       device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
 
        return do_smbus_send_byte(res->base, device, val);
@@ -49,7 +49,7 @@ static int lsmbus_read_byte(device_t dev, uint8_t address)
        unsigned device;
        struct resource *res;
 
-       device = dev->path.u.i2c.device;
+       device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
        
        return do_smbus_read_byte(res->base, device, address);
@@ -60,22 +60,26 @@ static int lsmbus_write_byte(device_t dev, uint8_t address, uint8_t val)
        unsigned device;
        struct resource *res;
 
-       device = dev->path.u.i2c.device;
+       device = dev->path.i2c.device;
        res = find_resource(get_pbus_smbus(dev)->dev, 0x58);
        
        return do_smbus_write_byte(res->base, device, address, val);
 }
 
+#if CONFIG_GENERATE_ACPI_TABLES == 1
+unsigned pm_base;
+#endif
+
 static void acpi_init(struct device *dev)
 {
        uint8_t byte;
-       uint16_t word;
        uint16_t pm10_bar;
        uint32_t dword;
        int on;
 
 #if 0
-       printk_debug("ACPI: disabling NMI watchdog.. ");
+       uint16_t word;
+       printk(BIOS_DEBUG, "ACPI: disabling NMI watchdog.. ");
        byte = pci_read_config8(dev, 0x49);
        pci_write_config8(dev, 0x49, byte | (1<<2));
 
@@ -87,18 +91,27 @@ static void acpi_init(struct device *dev)
        byte = pci_read_config8(dev, 0x48);
        pci_write_config8(dev, 0x48, byte | (1<<3));
 
-       printk_debug("done.\n");
+       printk(BIOS_DEBUG, "done.\n");
 
 
-       printk_debug("ACPI: Routing IRQ 12 to PS2 port.. ");
+       printk(BIOS_DEBUG, "ACPI: Routing IRQ 12 to PS2 port.. ");
        word = pci_read_config16(dev, 0x46);
        pci_write_config16(dev, 0x46, word | (1<<9));
-       printk_debug("done.\n");
+       printk(BIOS_DEBUG, "done.\n");
+#endif
 
+       /* To enable the register 0xcf9 in the IO space
+        * bit [D5] is set in the amd8111 configuration register.
+        * The config. reg. is devBx41.  Register 0xcf9 allows
+        * hard reset capability to the system.  For the ACPI
+        * reset.reg values in fadt.c to work this register
+        * must be enabled.
+        */
+       byte = pci_read_config8(dev, 0x41);
+       pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5));
        
-#endif
        /* power on after power fail */
-       on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+       on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
        get_option(&on, "power_on_after_fail");
        byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
        byte &= ~0x40;
@@ -106,8 +119,14 @@ static void acpi_init(struct device *dev)
                byte |= 0x40;
        }
        pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
-       printk_info("set power %s after power fail\n", on?"on":"off");
+       printk(BIOS_INFO, "set power %s after power fail\n", on?"on":"off");
 
+       /* switch serial irq logic from quiet mode to continuous
+        * mode for Winbond W83627HF Rev. 17
+        */
+       byte = pci_read_config8(dev, 0x4a);
+       pci_write_config8(dev, 0x4a, byte | (1<<6));
+       
        /* Throttle the CPU speed down for testing */
        on = SLOW_CPU_OFF;
        get_option(&on, "slow_cpu");
@@ -116,9 +135,15 @@ static void acpi_init(struct device *dev)
                outl(((on<<1)+0x10)  ,(pm10_bar + 0x10));
                dword = inl(pm10_bar + 0x10);
                on = 8-on;
-               printk_debug("Throttling CPU %2d.%1.1d percent.\n",
+               printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
                                (on*12)+(on>>1),(on&1)*5);
        }
+
+#if CONFIG_GENERATE_ACPI_TABLES == 1
+       pm_base = pci_read_config16(dev, 0x58) & 0xff00;
+       printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base);
+#endif
+
 }
 
 static void acpi_read_resources(device_t dev)
@@ -187,7 +212,7 @@ static struct device_operations acpi_ops  = {
        .ops_smbus_bus    = &lops_smbus_bus,
 };
 
-static struct pci_driver acpi_driver __pci_driver = {
+static const struct pci_driver acpi_driver __pci_driver = {
        .ops    = &acpi_ops,
        .vendor = PCI_VENDOR_ID_AMD,
        .device = PCI_DEVICE_ID_AMD_8111_ACPI,