#define SLOW_CPU_OFF 0
#define SLOW_CPU__ON 1
-#ifndef MAINBOARD_POWER_ON_AFTER_POWER_FAIL
-#define MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
+#ifndef CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
+#define CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL MAINBOARD_POWER_ON
#endif
return do_smbus_write_byte(res->base, device, address, val);
}
-#if HAVE_ACPI_TABLES == 1
+#if CONFIG_GENERATE_ACPI_TABLES == 1
unsigned pm_base;
#endif
static void acpi_init(struct device *dev)
{
uint8_t byte;
- uint16_t word;
uint16_t pm10_bar;
uint32_t dword;
int on;
#if 0
- printk_debug("ACPI: disabling NMI watchdog.. ");
+ uint16_t word;
+ printk(BIOS_DEBUG, "ACPI: disabling NMI watchdog.. ");
byte = pci_read_config8(dev, 0x49);
pci_write_config8(dev, 0x49, byte | (1<<2));
byte = pci_read_config8(dev, 0x48);
pci_write_config8(dev, 0x48, byte | (1<<3));
- printk_debug("done.\n");
+ printk(BIOS_DEBUG, "done.\n");
- printk_debug("ACPI: Routing IRQ 12 to PS2 port.. ");
+ printk(BIOS_DEBUG, "ACPI: Routing IRQ 12 to PS2 port.. ");
word = pci_read_config16(dev, 0x46);
pci_write_config16(dev, 0x46, word | (1<<9));
- printk_debug("done.\n");
-
-
+ printk(BIOS_DEBUG, "done.\n");
#endif
+
/* To enable the register 0xcf9 in the IO space
* bit [D5] is set in the amd8111 configuration register.
* The config. reg. is devBx41. Register 0xcf9 allows
pci_write_config8(dev, 0x41, byte | (1<<6)|(1<<5));
/* power on after power fail */
- on = MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
+ on = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
get_option(&on, "power_on_after_fail");
byte = pci_read_config8(dev, PREVIOUS_POWER_STATE);
byte &= ~0x40;
byte |= 0x40;
}
pci_write_config8(dev, PREVIOUS_POWER_STATE, byte);
- printk_info("set power %s after power fail\n", on?"on":"off");
+ printk(BIOS_INFO, "set power %s after power fail\n", on?"on":"off");
/* switch serial irq logic from quiet mode to continuous
* mode for Winbond W83627HF Rev. 17
outl(((on<<1)+0x10) ,(pm10_bar + 0x10));
dword = inl(pm10_bar + 0x10);
on = 8-on;
- printk_debug("Throttling CPU %2d.%1.1d percent.\n",
+ printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
(on*12)+(on>>1),(on&1)*5);
}
-#if HAVE_ACPI_TABLES == 1
+#if CONFIG_GENERATE_ACPI_TABLES == 1
pm_base = pci_read_config16(dev, 0x58) & 0xff00;
- printk_debug("pm_base: 0x%04x\n",pm_base);
+ printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base);
#endif
}