Change license from GPLv3 to LGPLv3.

[seabios.git] / src / smpdetect.c

diff --git a/src/smpdetect.c b/src/smpdetect.c
index 7f0c7aaaec15084d30586d423e932a3ea0858a92..0617be45747eff7cbb6bf0a834cbfb7ab87fbd6a 100644 (file)
--- a/src/smpdetect.c
+++ b/src/smpdetect.c
@@ -3,10 +3,11 @@
 // Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
 // Copyright (C) 2006 Fabrice Bellard
 //
-// This file may be distributed under the terms of the GNU GPLv3 license.
+// This file may be distributed under the terms of the GNU LGPLv3 license.
 
 #include "util.h" // dprintf
 #include "config.h" // CONFIG_*
+#include "cmos.h" // CMOS_BIOS_SMP_COUNT
 
 #define CPUID_APIC (1 << 9)
 
@@ -45,11 +46,9 @@ static inline u8 readb(const void *addr)
     return *(volatile const u8 *)addr;
 }
 
+u32 smp_cpus VAR16_32;
 extern void smp_ap_boot_code();
-extern u32 smp_cpus;
-#if MODE16
-u32 smp_cpus VISIBLE16;
-asm(
+ASM16(
     "  .global smp_ap_boot_code\n"
     "smp_ap_boot_code:\n"
     // Increment the cpu counter
@@ -59,7 +58,6 @@ asm(
     // Halt the processor.
     "  jmp permanent_halt\n"
     );
-#endif
 
 /* find the number of CPUs by launching a SIPI to them */
 int
@@ -96,10 +94,13 @@ smp_probe(void)
     writel(APIC_ICR_LOW, 0x000C4600 | sipi_vector);
 
     // Wait for other CPUs to process the SIPI.
-    mdelay(10);
+    if (CONFIG_COREBOOT)
+        mdelay(10);
+    else
+        while (inb_cmos(CMOS_BIOS_SMP_COUNT) + 1 != readl(&smp_cpus))
+            ;
 
     // Restore memory.
-    writel(APIC_SVR, val);
     *(u64*)BUILD_AP_BOOT_ADDR = old;
 
     u32 count = readl(&smp_cpus);