// Rom layout and bios assembler to C interface.
//
-// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
+// Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
// Copyright (C) 2002 MandrakeSoft S.A.
//
-// This file may be distributed under the terms of the GNU GPLv3 license.
-
-#include "config.h"
-
-#define PROTECTED_MODE_CS (2 << 3) // 0x10
-#define PROTECTED_MODE_DS (3 << 3) // 0x18
-#define REAL_MODE_CS (4 << 3) // 0x20
-#define REAL_MODE_DS (5 << 3) // 0x28
-
- .code16gcc
+// This file may be distributed under the terms of the GNU LGPLv3 license.
/****************************************************************
* Include of 16bit C code
****************************************************************/
- .globl bios16c_start, bios16c_end
-bios16c_start:
-.include "out/blob.proc.16.s"
- .text
-bios16c_end:
-
-
-/****************************************************************
- * POST handler
- ****************************************************************/
-
- // Macro to reset the 16bit stack
- // Clobbers %ax
- .macro RESET_STACK
- xorw %ax, %ax
- movw %ax, %ss
- movl $ CONFIG_STACK_OFFSET , %esp
- .endm
-
- .org 0xe05b
- .globl post16
-post16:
- // init the stack pointer
- RESET_STACK
-
- // Set entry point of rombios32 code - the actual address
- // is altered later in the build process.
- .globl set_entry32
-set_entry32:
- pushl $0xf0000000
+ .code16gcc
+.include "out/ccode.16.s"
- // Fall through to transition32 function below
+#include "config.h" // CONFIG_*
+#include "ioport.h" // PORT_A20
+#include "bregs.h" // CR0_*
+#include "cmos.h" // CMOS_RESET_CODE
+#include "../out/asm-offsets.h" // BREGS_*
+#include "entryfuncs.S" // ENTRY_*
/****************************************************************
****************************************************************/
// Place CPU into 32bit mode from 16bit mode.
-// Clobbers: %eax, flags, stack registers, cr0, idt/gdt
+// Clobbers: flags, segment registers, cr0, idt/gdt
+ DECLFUNC transition32
transition32:
- // Disable irqs
+ pushl %eax
+
+ // Disable irqs (and clear direction flag)
cli
+ cld
+
+ // Disable nmi
+ movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
+ outb %al, $PORT_CMOS_INDEX
+ inb $PORT_CMOS_DATA, %al
// enable a20
- inb $0x92, %al
- orb $0x02, %al
- outb %al, $0x92
+ inb $PORT_A20, %al
+ orb $A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
// Set segment descriptors
- lidt %cs:pmode_IDT_info
- lgdt %cs:rombios32_gdt_48
+ lidtw %cs:pmode_IDT_info
+ lgdtw %cs:rombios32_gdt_48
- // set PE bit in CR0
- movl %cr0, %eax
- orb $0x01, %al
- movl %eax, %cr0
+ // Enable protected mode
+ movl %cr0, %eax
+ orl $CR0_PE, %eax
+ movl %eax, %cr0
- // start protected mode code
- // ljmpl $PROTECTED_MODE_CS, $(1f | 0xf0000)
- .word 0xea66, 1f, 0x000f, PROTECTED_MODE_CS
+ // start 32bit protected mode code
+ ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f)
.code32
1:
// init data segments
- movl $PROTECTED_MODE_DS, %eax
+ movl $SEG32_MODE32_DS, %eax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
- xorl %eax, %eax
movw %ax, %fs
movw %ax, %gs
- cld
-
+ popl %eax
retl
// Call a 16bit function from 32bit mode.
// %eax = address of struct bregs
-// Clobbers: all gp registers, flags, stack registers, cr0, idt/gdt
- .globl __call16_from32
+// Clobbers: %e[bcd]x, %e[ds]i, flags, segment registers, idt/gdt
+ DECLFUNC __call16_from32
+ .global __call16big_from32
__call16_from32:
pushl %eax
+ // restore data segment limits to 0xffff
+ movl $SEG32_MODE16_DS, %eax
+ movw %ax, %ds
+ movw %ax, %es
+ movw %ax, %ss
+ movw %ax, %fs
+ movw %ax, %gs
+
+#if CONFIG_DISABLE_A20
+ // disable a20
+ inb $PORT_A20, %al
+ andb $~A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
+#endif
+
// Jump to 16bit mode
- ljmp $0x20, $1f
+ ljmpw $SEG32_MODE16_CS, $1f
- .code16gcc
-1:
- // restore data segment limits to 0xffff
- movw $0x28, %ax
+__call16big_from32:
+ pushl %eax
+
+ movl $SEG32_MODE16BIG_DS, %eax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
- // reset PE bit in CR0
+ ljmpl $SEG32_MODE16BIG_CS, $(BUILD_BIOS_ADDR + 1f)
+
+ .code16gcc
+1:
+ // Disable protected mode
movl %cr0, %eax
- andb $0xfe, %al
+ andl $~CR0_PE, %eax
movl %eax, %cr0
// far jump to flush CPU queue after transition to real mode
- ljmpw $0xf000, $2f
+ ljmpw $SEG_BIOS, $2f
2:
// restore IDT to normal real-mode defaults
- lidt %cs:rmode_IDT_info
+ lidtw %cs:rmode_IDT_info
// Clear segment registers
xorw %ax, %ax
movw %ax, %ss // Assume stack is in segment 0
popl %eax
- pushl $transition32
- // Fall through to __call16
+ // Make call.
+ calll __call16
+
+ // Return via transition32
+ jmp transition32
// Call a 16bit function from 16bit mode with a specified cpu register state
// %eax = address of struct bregs
-// Clobbers: all gp registers, es
- .globl __call16
+// Clobbers: %e[bcd]x, %e[ds]i, flags
+ DECLFUNC __call16
__call16:
- // Save eax
+ // Save %eax, %ebp
+ pushl %ebp
pushl %eax
// Setup for iretw call
- pushw $0xf000
+ pushw %cs
pushw $1f // return point
- pushw 0x28(%eax) // flags
- pushl 0x24(%eax) // CS:IP
+ pushw BREGS_flags(%eax) // flags
+ pushl BREGS_ip(%eax) // CS:IP
// Load calling registers.
- movl 0x04(%eax), %edi
- movl 0x08(%eax), %esi
- movl 0x0c(%eax), %ebp
- movl 0x14(%eax), %ebx
- movl 0x18(%eax), %edx
- movl 0x1c(%eax), %ecx
- movw 0x02(%eax), %es // XXX - should load %ds too
- movl 0x20(%eax), %eax
+ movl BREGS_edi(%eax), %edi
+ movl BREGS_esi(%eax), %esi
+ movl BREGS_ebp(%eax), %ebp
+ movl BREGS_ebx(%eax), %ebx
+ movl BREGS_edx(%eax), %edx
+ movl BREGS_ecx(%eax), %ecx
+ movw BREGS_es(%eax), %es
+ movw BREGS_ds(%eax), %ds
+ movl %ss:BREGS_eax(%eax), %eax
// Invoke call
iretw // XXX - just do a lcalll
pushfw
pushl %eax
movl 0x06(%esp), %eax
- movl %ecx, 0x1c(%eax) // Save %ecx
+ movl %ecx, %ss:BREGS_ecx(%eax)
+ movw %ds, %ss:BREGS_ds(%eax)
+ movw %ss, %cx
+ movw %cx, %ds // Restore %ds == %ss
popl %ecx
- movl %ecx, 0x20(%eax) // Save %eax
+ movl %ecx, BREGS_eax(%eax)
popw %cx
- movw %cx, 0x28(%eax) // Save flags
+ movw %cx, BREGS_flags(%eax)
// Store remaining registers
- movw %es, 0x02(%eax)
- movl %edi, 0x04(%eax)
- movl %esi, 0x08(%eax)
- movl %ebp, 0x0c(%eax)
- movl %ebx, 0x14(%eax)
- movl %edx, 0x18(%eax)
-
- // Remove %eax
+ movw %es, BREGS_es(%eax)
+ movl %edi, BREGS_edi(%eax)
+ movl %esi, BREGS_esi(%eax)
+ movl %ebp, BREGS_ebp(%eax)
+ movl %ebx, BREGS_ebx(%eax)
+ movl %edx, BREGS_edx(%eax)
+
+ // Remove %eax, restore %ebp
popl %eax
+ popl %ebp
retl
+// IRQ trampolines
+ .macro IRQ_TRAMPOLINE num
+ DECLFUNC irq_trampoline_0x\num
+ irq_trampoline_0x\num :
+ int $0x\num
+ lretw
+ .endm
+
+ IRQ_TRAMPOLINE 10
+ IRQ_TRAMPOLINE 13
+ IRQ_TRAMPOLINE 15
+ IRQ_TRAMPOLINE 16
+ IRQ_TRAMPOLINE 18
+ IRQ_TRAMPOLINE 19
+
/****************************************************************
- * GDT and IDT tables
+ * POST entry point
****************************************************************/
-// Protected mode IDT descriptor
-//
-// I just make the limit 0, so the machine will shutdown
-// if an exception occurs during protected mode memory
-// transfers.
-//
-// Set base to f0000 to correspond to beginning of BIOS,
-// in case I actually define an IDT later
-// Set limit to 0
-pmode_IDT_info:
- .word 0x0000 // limit 15:00
- .long 0xf0000 // base 16:47
-
-// Real mode IDT descriptor
-//
-// Set to typical real-mode values.
-// base = 000000
-// limit = 03ff
-rmode_IDT_info:
- .word 0x03ff // limit 15:00
- .long 0 // base 16:47
-
-rombios32_gdt_48:
- .word 0x30
- .word rombios32_gdt
- .word 0x000f
-
-rombios32_gdt:
- .word 0, 0, 0, 0
- .word 0, 0, 0, 0
- // 32 bit flat code segment (PROTECTED_MODE_CS)
- .word 0xffff, 0, 0x9b00, 0x00cf
- // 32 bit flat data segment (PROTECTED_MODE_DS)
- .word 0xffff, 0, 0x9300, 0x00cf
- // 16 bit code segment base=0xf0000 limit=0xffff (REAL_MODE_CS)
- .word 0xffff, 0, 0x9b0f, 0x0000
- // 16 bit data segment base=0x0 limit=0xffff (REAL_MODE_DS)
- .word 0xffff, 0, 0x9300, 0x0000
-
-// We need a copy of this string, but we are not actually a PnP BIOS,
-// so make sure it is *not* aligned, so OSes will not see it if they
-// scan.
- .align 2
- .byte 0
- .globl pnp_string
-pnp_string:
- .ascii "$PnP"
+ DECLFUNC entry_post
+entry_post:
+ // Enable cache
+ movl %cr0, %eax
+ andl $~(CR0_CD|CR0_NW), %eax
+ movl %eax, %cr0
+
+ // Disable interrupts
+ cli
+ cld
+
+ // Check for restart indicator.
+ movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
+ outb %al, $PORT_CMOS_INDEX
+ inb $PORT_CMOS_DATA, %al
+ cmpb $0x0, %al
+ jnz 1f
+
+ // Normal entry point
+ ENTRY_INTO32 _start
+
+ // Entry point when a post call looks like a resume.
+1:
+ // Save old shutdown status.
+ movl %eax, %ebx
+
+ // Clear shutdown status register.
+ movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
+ outb %al, $PORT_CMOS_INDEX
+ xorl %eax, %eax
+ outb %al, $PORT_CMOS_DATA
+
+ // Use a stack in EBDA
+ movw $SEG_BDA, %ax
+ movw %ax, %ds
+ movw BDA_ebda_seg, %ax
+
+ cmpw $EBDA_SEGMENT_START, %ax
+ jle 2f
+ // EBDA segment doesn't look valid - use startup value.
+ movw $EBDA_SEGMENT_START, %ax
+
+2: movw %ax, %ds
+ movw %ax, %ss
+ movl $EBDA_OFFSET_TOP_STACK, %esp
+
+ // Call handler.
+ movl %ebx, %eax
+ jmp handle_resume
/****************************************************************
- * Interrupt entry points
+ * Misc. entry points.
****************************************************************/
- .macro ENTRY cfunc
- cli // In case something far-calls instead of using "int"
- pushal
+// PnP entry points
+ DECLFUNC entry_pnp_real
+ .global entry_pnp_prot
+entry_pnp_prot:
+ pushl %esp
+ jmp 1f
+entry_pnp_real:
+ pushl %esp // Backup %esp, then clear high bits
+ movzwl %sp, %esp
+1:
+ pushfl // Save registers clobbered by C code
+ pushl %eax
+ pushl %ecx
+ pushl %edx
pushw %es
pushw %ds
- movw %ss, %ax
- movw %ax, %ds
- movzwl %sp, %esp
- movl %esp, %eax
- calll \cfunc
+ movw %ss, %cx // Move %ss to %ds
+ movw %cx, %ds
+ lea 28(%esp), %eax // %eax points to start of u16 args
+ calll handle_pnp
+ movw %ax, 12(%esp) // Modify %eax to return %ax
popw %ds
popw %es
- popal
- .endm
+ popl %edx
+ popl %ecx
+ popl %eax
+ popfl
+ popl %esp
+ lretw
+
+// APM entry points
+ DECLFUNC apm16protected_entry
+apm16protected_entry:
+ pushfw // save flags
+ pushl %eax // dummy
+ ENTRY_ARG handle_1553
+ addw $4, %sp // pop dummy
+ popfw // restore flags
+ lretw
+
+ .code32
+ DECLFUNC apm32protected_entry
+apm32protected_entry:
+ pushfw
+ pushw %cs // Setup for long jump to 16bit mode
+ pushw $1f
+ addw $8, 2(%esp)
+ ljmpw *(%esp)
+ .code16gcc
+1:
+ ENTRY_ARG_ESP handle_1553
+
+ movw $2f,(%esp) // Setup for long jump back to 32bit mode
+ subw $8, 2(%esp)
+ ljmpw *(%esp)
+ .code32
+2:
+ addl $4, %esp // pop call address
+ popfw
+ lretl
+
+// 32bit elf entry point
+ EXPORTFUNC post32
+post32:
+ cli
+ cld
+ lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
+ lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
+ movl $SEG32_MODE32_DS, %eax
+ movw %ax, %ds
+ movw %ax, %es
+ movw %ax, %fs
+ movw %ax, %gs
+ movw %ax, %ss
+ movl $BUILD_STACK_ADDR, %esp
+ ljmpl $SEG32_MODE32_CS, $_start
+ .code16gcc
+
+
+/****************************************************************
+ * Interrupt entry points
+ ****************************************************************/
+
+ // Define an entry point for an interrupt (no args passed).
.macro IRQ_ENTRY num
- .globl entry_\num
+ .global entry_\num
entry_\num :
- ENTRY handle_\num
- iretw
+ pushl $ handle_\num
+ jmp irqentry
.endm
- .macro IRQ_TRAMPOLINE num
- .globl irq_trampoline_0x\num
- irq_trampoline_0x\num :
- int $0x\num
- lretw
+ // Define an entry point for an interrupt (can read/modify args).
+ .macro IRQ_ENTRY_ARG num
+ .global entry_\num
+ entry_\num :
+ pushl $ handle_\num
+ jmp irqentryarg
.endm
- .org 0xe2c3
- IRQ_ENTRY nmi
+ // Macros that put each handler into its own section
+ .macro DECL_IRQ_ENTRY num
+ DECLFUNC entry_\num
+ IRQ_ENTRY \num
+ .endm
+ .macro DECL_IRQ_ENTRY_ARG num
+ DECLFUNC entry_\num
+ IRQ_ENTRY_ARG \num
+ .endm
+
+ // Main entry point for interrupts without args
+ DECLFUNC irqentry
+irqentry:
+ ENTRY_ST
+ iretw
+
+ // Main entry point for interrupts with args
+ DECLFUNC irqentryarg
+irqentryarg:
+ ENTRY_ARG_ST
+ iretw
- IRQ_ENTRY 13
- IRQ_ENTRY 12
- IRQ_ENTRY 11
- IRQ_ENTRY 76
- IRQ_ENTRY 1c
- IRQ_ENTRY 70
- IRQ_ENTRY 74
- IRQ_ENTRY 75
+ DECL_IRQ_ENTRY_ARG 13
+ DECL_IRQ_ENTRY 76
+ DECL_IRQ_ENTRY 70
+ DECL_IRQ_ENTRY 74
+ DECL_IRQ_ENTRY 75
+ DECL_IRQ_ENTRY hwpic1
+ DECL_IRQ_ENTRY hwpic2
- .globl entry_19
+ // int 18/19 are special - they reset stack and call into 32bit mode.
+ DECLFUNC entry_19
entry_19:
- RESET_STACK
- calll handle_19
+ ENTRY_INTO32 handle_19
- .globl entry_18
+ DECLFUNC entry_18
entry_18:
- RESET_STACK
- calll handle_18
+ ENTRY_INTO32 handle_18
- IRQ_TRAMPOLINE 02
- IRQ_TRAMPOLINE 10
- IRQ_TRAMPOLINE 13
- IRQ_TRAMPOLINE 15
- IRQ_TRAMPOLINE 18
- IRQ_TRAMPOLINE 19
- IRQ_TRAMPOLINE 1c
- IRQ_TRAMPOLINE 4a
- .org 0xe3fe
+/****************************************************************
+ * Fixed position entry points
+ ****************************************************************/
+
+ // Specify a location in the fixed part of bios area.
+ .macro ORG addr
+ .section .fixedaddr.\addr
+ .endm
+
+ ORG 0xe05b
+entry_post_official:
+ jmp entry_post
+
+ ORG 0xe2c3
+ IRQ_ENTRY 02
+
+ ORG 0xe3fe
+ .global entry_13_official
+entry_13_official:
jmp entry_13
- .org 0xe401
- // XXX - Fixed Disk Parameter Table
+ // 0xe401 - OldFDPT in disk.c
- .org 0xe6f2
+ ORG 0xe6f2
+ .global entry_19_official
+entry_19_official:
jmp entry_19
- .org 0xe6f5
-.include "out/cbt.proc.16.s"
- .text
+ // 0xe6f5 - BIOS_CONFIG_TABLE in misc.c
- .org 0xe729
- // XXX - Baud Rate Generator Table
+ // 0xe729 - BaudTable in serial.c
- .org 0xe739
- IRQ_ENTRY 14
+ ORG 0xe739
+ IRQ_ENTRY_ARG 14
- .org 0xe82e
- IRQ_ENTRY 16
+ ORG 0xe82e
+ IRQ_ENTRY_ARG 16
- .org 0xe987
+ ORG 0xe987
IRQ_ENTRY 09
- .org 0xec59
- IRQ_ENTRY 40
+ ORG 0xec59
+ IRQ_ENTRY_ARG 40
- .org 0xef57
+ ORG 0xef57
IRQ_ENTRY 0e
- .org 0xefc7
- // XXX - Diskette Controller Parameter Table
+ // 0xefc7 - diskette_param_table in floppy.c
- .org 0xefd2
- IRQ_ENTRY 17
+ ORG 0xefd2
+ IRQ_ENTRY_ARG 17
- .org 0xf045
- // XXX int 10
+ ORG 0xf045
+entry_10_0x0f:
+ // XXX - INT 10 Functions 0-Fh Entry Point
iretw
- .org 0xf065
- IRQ_ENTRY 10
-
- .org 0xf0a4
- // XXX int 1D
- iretw
+ ORG 0xf065
+ IRQ_ENTRY_ARG 10
- .globl freespace2_start, freespace2_end
-freespace2_start:
+ // 0xf0a4 - VideoParams in misc.c
- .org 0xf841
-freespace2_end:
- jmp entry_12
+ ORG 0xf841
+ IRQ_ENTRY_ARG 12
- .org 0xf84d
- jmp entry_11
+ ORG 0xf84d
+ IRQ_ENTRY_ARG 11
- .org 0xf859
- IRQ_ENTRY 15
+ ORG 0xf859
+ IRQ_ENTRY_ARG 15
- .org 0xfa6e
-.include "out/font.proc.16.s"
- .text
+ // 0xfa6e - vgafont8 in font.c
- .org 0xfe6e
- IRQ_ENTRY 1a
+ ORG 0xfe6e
+ IRQ_ENTRY_ARG 1a
- .org 0xfea5
+ ORG 0xfea5
IRQ_ENTRY 08
- .org 0xfef3
- // XXX - Initial Interrupt Vector Offsets Loaded by POST
+ // 0xfef3 - InitVectors in misc.c
- .org 0xff00
- // XXX - BIOS_COPYRIGHT_STRING
- .ascii "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
+ // 0xff00 - BiosCopyright in misc.c
- .org 0xff53
- .globl dummy_iret_handler
-dummy_iret_handler:
+ ORG 0xff53
+ .global entry_iret_official
+entry_iret_official:
iretw
- .org 0xff54
- IRQ_ENTRY 05
+ ORG 0xff54
+ IRQ_ENTRY_ARG 05
+
+ ORG 0xfff0 // Power-up Entry Point
+ .global reset_vector
+reset_vector:
+ ljmpw $SEG_BIOS, $entry_post_official
- .org 0xfff0 // Power-up Entry Point
- ljmpw $0xf000, $post16
+ // 0xfff5 - BiosDate in misc.c
- .org 0xfff5
- // BIOS build date
- .ascii "06/23/99"
+ // 0xfffe - BiosModelId in misc.c
- .org 0xfffe
- // XXX - model byte 0xFC = AT
- .byte 0xfc
- .byte 0x00
+ // 0xffff - BiosChecksum in misc.c
.end