//
// This file may be distributed under the terms of the GNU GPLv3 license.
-#include "config.h"
-
-#define PROTECTED_MODE_CS (2 << 3) // 0x10
-#define PROTECTED_MODE_DS (3 << 3) // 0x18
-#define REAL_MODE_CS (4 << 3) // 0x20
-#define REAL_MODE_DS (5 << 3) // 0x28
-
- .code16gcc
+#include "config.h" // CONFIG_*
+#include "ioport.h" // PORT_A20
+#include "bregs.h" // CR0_*
+#include "../out/asm-offsets.h" // BREGS_*
/****************************************************************
* Include of 16bit C code
****************************************************************/
- .globl bios16c_start, bios16c_end
-bios16c_start:
-.include "out/blob.proc.16.s"
- .text
-bios16c_end:
+ .code16gcc
+.include "out/blob.16.s"
/****************************************************************
popl %eax
.endm
+ // As above, but don't mangle %esp
+ .macro ENTRY_ARG_ESP cfunc
+ cld
+ pushl %eax // Save registers (matches struct bregs)
+ pushl %ecx
+ pushl %edx
+ pushl %ebx
+ pushl %esi
+ pushl %edi
+ pushw %es
+ pushw %ds
+ movw %ss, %ax // Move %ss to %ds
+ movw %ax, %ds
+ movl %esp, %eax // First arg is pointer to struct bregs
+ calll \cfunc
+ popw %ds // Restore registers (from struct bregs)
+ popw %es
+ popl %edi
+ popl %esi
+ popl %ebx
+ popl %edx
+ popl %ecx
+ popl %eax
+ .endm
+
// Macro to reset the 16bit stack
// Clobbers %ax
.macro RESET_STACK
xorw %ax, %ax
movw %ax, %ss
- movl $ CONFIG_STACK_OFFSET , %esp
+ movl $ BUILD_STACK_ADDR , %esp
+ cld
+ .endm
+
+ // Specify a location in the fixed part of bios area.
+ .macro ORG addr
+ .section .text.fixed.addr
+ .org \addr - BUILD_START_FIXED
.endm
* POST handler
****************************************************************/
- .org 0xe05b
- .globl post16
+ ORG 0xe05b
post16:
+ // enable cache
+ movl %cr0, %eax
+ andl $~(CR0_CD|CR0_NW), %eax
+ movl %eax, %cr0
+
// init the stack pointer
RESET_STACK
- // Set entry point of rombios32 code - the actual address
- // is altered later in the build process.
- .globl set_entry32
-set_entry32:
- pushl $0xf0000000
-
- cld
+ pushl $_code32__start
// Fall through to transition32 function below
cli
// enable a20
- inb $0x92, %al
- orb $0x02, %al
- outb %al, $0x92
+ inb $PORT_A20, %al
+ orb $A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
// Set segment descriptors
lidt %cs:pmode_IDT_info
lgdt %cs:rombios32_gdt_48
- // set PE bit in CR0
- movl %cr0, %eax
- orb $0x01, %al
- movl %eax, %cr0
+ // Enable protected mode
+ movl %cr0, %eax
+ orl $CR0_PE, %eax
+ movl %eax, %cr0
// start protected mode code
- // ljmpl $PROTECTED_MODE_CS, $(1f | 0xf0000)
- .word 0xea66, 1f, 0x000f, PROTECTED_MODE_CS
+ ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f)
.code32
1:
// init data segments
- movl $PROTECTED_MODE_DS, %eax
+ movl $SEG32_MODE32_DS, %eax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
// Call a 16bit function from 32bit mode.
// %eax = address of struct bregs
// Clobbers: all gp registers, flags, stack registers, cr0, idt/gdt
- .globl __call16_from32
+ .global __call16_from32
__call16_from32:
pushl %eax
- // Jump to 16bit mode
- ljmpw $REAL_MODE_CS, $1f
-
- .code16gcc
-1:
// restore data segment limits to 0xffff
- movw $REAL_MODE_DS, %ax
+ movw $SEG32_MODE16_DS, %ax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
- // reset PE bit in CR0
+ // disable a20
+ inb $PORT_A20, %al
+ andb $~A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
+
+ // Jump to 16bit mode
+ ljmpw $SEG32_MODE16_CS, $1f
+
+ .code16gcc
+1:
+ // Disable protected mode
movl %cr0, %eax
- andb $0xfe, %al
+ andl $~CR0_PE, %eax
movl %eax, %cr0
// far jump to flush CPU queue after transition to real mode
- ljmpw $0xf000, $2f
+ ljmpw $SEG_BIOS, $2f
2:
// restore IDT to normal real-mode defaults
// Call a 16bit function from 16bit mode with a specified cpu register state
// %eax = address of struct bregs
// Clobbers: all gp registers, es
- .globl __call16
+ .global __call16
__call16:
// Save eax
pushl %eax
// Setup for iretw call
- pushw $0xf000
+ pushw $SEG_BIOS
pushw $1f // return point
- pushw 0x20(%eax) // flags
- pushl 0x1c(%eax) // CS:IP
+ pushw BREGS_flags(%eax) // flags
+ pushl BREGS_ip(%eax) // CS:IP
// Load calling registers.
- movl 0x04(%eax), %edi
- movl 0x08(%eax), %esi
- movl 0x0c(%eax), %ebx
- movl 0x10(%eax), %edx
- movl 0x14(%eax), %ecx
- movw 0x02(%eax), %es // XXX - should load %ds too
- movl 0x18(%eax), %eax
+ movl BREGS_edi(%eax), %edi
+ movl BREGS_esi(%eax), %esi
+ movl BREGS_ebx(%eax), %ebx
+ movl BREGS_edx(%eax), %edx
+ movl BREGS_ecx(%eax), %ecx
+ movw BREGS_es(%eax), %es
+ movw BREGS_ds(%eax), %ds
+ movl %ss:BREGS_eax(%eax), %eax
// Invoke call
iretw // XXX - just do a lcalll
pushfw
pushl %eax
movl 0x06(%esp), %eax
- movl %ecx, %ss:0x14(%eax) // Save %ecx
+ movl %ecx, %ss:BREGS_ecx(%eax)
+ movw %ds, %ss:BREGS_ds(%eax)
movw %ss, %cx
- movw %cx, %ds // Restore %ds == %ss
+ movw %cx, %ds // Restore %ds == %ss
popl %ecx
- movl %ecx, 0x18(%eax) // Save %eax
+ movl %ecx, BREGS_eax(%eax)
popw %cx
- movw %cx, 0x20(%eax) // Save flags
+ movw %cx, BREGS_flags(%eax)
// Store remaining registers
- movw %es, 0x02(%eax)
- movl %edi, 0x04(%eax)
- movl %esi, 0x08(%eax)
- movl %ebx, 0x0c(%eax)
- movl %edx, 0x10(%eax)
+ movw %es, BREGS_es(%eax)
+ movl %edi, BREGS_edi(%eax)
+ movl %esi, BREGS_esi(%eax)
+ movl %ebx, BREGS_ebx(%eax)
+ movl %edx, BREGS_edx(%eax)
// Remove %eax
popl %eax
// APM trampolines
- .globl apm16protected_entry
+ .global apm16protected_entry
apm16protected_entry:
pushfw // save flags
pushl %eax // dummy
lretw
.code32
- .globl apm32protected_entry
+ .global apm32protected_entry
apm32protected_entry:
pushfw
pushw %cs // Setup for long jump to 16bit mode
pushw $1f
- incw 2(%esp)
+ addw $8, 2(%esp)
ljmpw *(%esp)
.code16gcc
1:
- ENTRY_ARG handle_1553
+ ENTRY_ARG_ESP handle_1553
movw $2f,(%esp) // Setup for long jump back to 32bit mode
- decw 2(%esp)
+ subw $8, 2(%esp)
ljmpw *(%esp)
.code32
2:
addl $4, %esp // pop call address
popfw
lretl
+
+// 32bit elf entry point
+ .global post32
+post32:
+ cli
+ cld
+ lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
+ lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
+ movl $BUILD_STACK_ADDR, %esp
+ ljmpl $SEG32_MODE32_CS, $_code32__start
+
.code16gcc
+// Shutdown a CPU. We want this in the 0xf000 section to ensure that
+// the code wont be overwritten with something else. (Should
+// something spurious wake up the CPU, we want to be sure that the hlt
+// insn will still be present and will shutdown the CPU.)
+ .global permanent_halt
+permanent_halt:
+ cli
+1: hlt
+ jmp 1b
+
/****************************************************************
* GDT and IDT tables
rombios32_gdt:
.word 0, 0, 0, 0
.word 0, 0, 0, 0
- // 32 bit flat code segment (PROTECTED_MODE_CS)
+ // 32 bit flat code segment (SEG32_MODE32_CS)
.word 0xffff, 0, 0x9b00, 0x00cf
- // 32 bit flat data segment (PROTECTED_MODE_DS)
+ // 32 bit flat data segment (SEG32_MODE32_DS)
.word 0xffff, 0, 0x9300, 0x00cf
- // 16 bit code segment base=0xf0000 limit=0xffff (REAL_MODE_CS)
+ // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
.word 0xffff, 0, 0x9b0f, 0x0000
- // 16 bit data segment base=0x0 limit=0xffff (REAL_MODE_DS)
+ // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
.word 0xffff, 0, 0x9300, 0x0000
+// We need a copy of this string in the 0xf000 segment, but we are not
+// actually a PnP BIOS, so make sure it is *not* aligned, so OSes will
+// not see it if they scan.
+ .global pnp_string
+ .balign 2
+ .byte 0
+pnp_string:
+ .ascii "$PnP"
+
/****************************************************************
* Interrupt entry points
// Define an entry point for an interrupt (no args passed).
.macro IRQ_ENTRY num
- .globl entry_\num
+ .global entry_\num
entry_\num :
cli // In case something far-calls instead of using "int"
ENTRY handle_\num
// Define an entry point for an interrupt (can read/modify args).
.macro IRQ_ENTRY_ARG num
- .globl entry_\num
+ .global entry_\num
entry_\num :
cli // In case something far-calls instead of using "int"
ENTRY_ARG handle_\num
iretw
.endm
- .org 0xe2c3
+ ORG 0xe2c3
IRQ_ENTRY nmi
IRQ_ENTRY_ARG 13
IRQ_ENTRY 1c
IRQ_ENTRY 70
- .org 0xe3fe
+ ORG 0xe3fe
jmp entry_13
- .org 0xe401
+ ORG 0xe401
// XXX - Fixed Disk Parameter Table
- .org 0xe6f2
+ ORG 0xe6f2
jmp entry_19
- .org 0xe6f5
+ ORG 0xe6f5
.include "out/cbt.proc.16.s"
.text
- .org 0xe729
+ ORG 0xe729
// XXX - Baud Rate Generator Table
- .org 0xe739
+ ORG 0xe739
IRQ_ENTRY_ARG 14
IRQ_ENTRY 74
IRQ_ENTRY 75
// int 18/19 are special - they reset the stack and do not return.
- .globl entry_19
+ .global entry_19
entry_19:
RESET_STACK
- ENTRY handle_19
+ pushl $_code32_handle_19
+ jmp transition32
- .globl entry_18
+ .global entry_18
entry_18:
RESET_STACK
- ENTRY handle_18
+ pushl $_code32_handle_18
+ jmp transition32
// IRQ trampolines
.macro IRQ_TRAMPOLINE num
- .globl irq_trampoline_0x\num
+ .global irq_trampoline_0x\num
irq_trampoline_0x\num :
int $0x\num
lretw
IRQ_TRAMPOLINE 10
IRQ_TRAMPOLINE 13
IRQ_TRAMPOLINE 15
+ IRQ_TRAMPOLINE 16
IRQ_TRAMPOLINE 18
IRQ_TRAMPOLINE 19
IRQ_TRAMPOLINE 1c
IRQ_TRAMPOLINE 4a
- .org 0xe82e
+ ORG 0xe82e
IRQ_ENTRY_ARG 16
- .org 0xe987
+entry_hwirq:
+ ENTRY handle_hwirq
+
+ ORG 0xe987
IRQ_ENTRY 09
- .org 0xec59
+ ORG 0xec59
IRQ_ENTRY_ARG 40
- .org 0xef57
+ ORG 0xef57
IRQ_ENTRY 0e
- .org 0xefc7
+ ORG 0xefc7
.include "out/floppy_dbt.proc.16.s"
.text
- .org 0xefd2
+ ORG 0xefd2
IRQ_ENTRY_ARG 17
- .org 0xf045
+ ORG 0xf045
// XXX int 10
iretw
- .org 0xf065
+ ORG 0xf065
IRQ_ENTRY_ARG 10
- .org 0xf0a4
+ ORG 0xf0a4
// XXX int 1D
iretw
- .globl freespace2_start, freespace2_end
+ .global freespace2_start, freespace2_end
freespace2_start:
- .org 0xf841
+ ORG 0xf841
freespace2_end:
jmp entry_12
- .org 0xf84d
+ ORG 0xf84d
jmp entry_11
- .org 0xf859
+ ORG 0xf859
IRQ_ENTRY_ARG 15
- .org 0xfa6e
+ ORG 0xfa6e
.include "out/font.proc.16.s"
.text
- .org 0xfe6e
+ ORG 0xfe6e
IRQ_ENTRY_ARG 1a
- .org 0xfea5
+ ORG 0xfea5
IRQ_ENTRY 08
- .org 0xfef3
+ ORG 0xfef3
// XXX - Initial Interrupt Vector Offsets Loaded by POST
- .org 0xff00
+ ORG 0xff00
// XXX - BIOS_COPYRIGHT_STRING
.ascii "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
- .org 0xff53
- .globl dummy_iret_handler
+ ORG 0xff53
+ .global dummy_iret_handler
dummy_iret_handler:
iretw
- .org 0xff54
+ ORG 0xff54
IRQ_ENTRY_ARG 05
- .org 0xfff0 // Power-up Entry Point
- ljmpw $0xf000, $post16
+ ORG 0xfff0 // Power-up Entry Point
+ ljmpw $SEG_BIOS, $post16
- .org 0xfff5
+ ORG 0xfff5
// BIOS build date
.ascii "06/23/99"
- .org 0xfffe
+ ORG 0xfffe
.byte CONFIG_MODEL_ID
+
+ .global bios_checksum
+bios_checksum:
.byte 0x00
.end
projects / seabios.git / blobdiff