// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
// Copyright (C) 2002 MandrakeSoft S.A.
//
-// This file may be distributed under the terms of the GNU GPLv3 license.
+// This file may be distributed under the terms of the GNU LGPLv3 license.
-#include "config.h"
-
-#define PROTECTED_MODE_CS (2 << 3) // 0x10
-#define PROTECTED_MODE_DS (3 << 3) // 0x18
-#define REAL_MODE_CS (4 << 3) // 0x20
-#define REAL_MODE_DS (5 << 3) // 0x28
+#include "config.h" // CONFIG_*
+#include "ioport.h" // PORT_A20
+#include "bregs.h" // CR0_*
+#include "cmos.h" // CMOS_RESET_CODE
+#include "../out/asm-offsets.h" // BREGS_*
/****************************************************************
****************************************************************/
.code16gcc
-.include "out/blob.16.s"
+.include "out/ccode.16.s"
/****************************************************************
xorw %ax, %ax
movw %ax, %ss
movl $ BUILD_STACK_ADDR , %esp
+ cld
.endm
// Specify a location in the fixed part of bios area.
****************************************************************/
ORG 0xe05b
- .globl post16
post16:
- // init the stack pointer
- RESET_STACK
+ // enable cache
+ movl %cr0, %eax
+ andl $~(CR0_CD|CR0_NW), %eax
+ movl %eax, %cr0
- // Set entry point of rombios32 code - the actual address
- // is altered later in the build process.
- .globl set_entry32
-set_entry32:
- pushl $0xf0000000
+ // Check for restart indicator.
+ movl $CMOS_RESET_CODE, %eax
+ outb %al, $PORT_CMOS_INDEX
+ inb $PORT_CMOS_DATA, %al
+ cmpb $0x0, %al
+ jnz entry_resume
- cld
+ // Normal entry point
+ RESET_STACK
+
+ pushl $_code32__start
// Fall through to transition32 function below
cli
// enable a20
- inb $0x92, %al
- orb $0x02, %al
- outb %al, $0x92
+ inb $PORT_A20, %al
+ orb $A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
// Set segment descriptors
- lidt %cs:pmode_IDT_info
- lgdt %cs:rombios32_gdt_48
+ lidtw %cs:pmode_IDT_info
+ lgdtw %cs:rombios32_gdt_48
- // set PE bit in CR0
- movl %cr0, %eax
- orb $0x01, %al
- movl %eax, %cr0
+ // Enable protected mode
+ movl %cr0, %eax
+ orl $CR0_PE, %eax
+ movl %eax, %cr0
- // start protected mode code
- // ljmpl $PROTECTED_MODE_CS, $(1f | 0xf0000)
- .word 0xea66, 1f, 0x000f, PROTECTED_MODE_CS
+ // start 32bit protected mode code
+ ljmpl $SEG32_MODE32_CS, $(BUILD_BIOS_ADDR + 1f)
.code32
1:
// init data segments
- movl $PROTECTED_MODE_DS, %eax
+ movl $SEG32_MODE32_DS, %eax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
- xorl %eax, %eax
movw %ax, %fs
movw %ax, %gs
// Call a 16bit function from 32bit mode.
// %eax = address of struct bregs
// Clobbers: all gp registers, flags, stack registers, cr0, idt/gdt
- .globl __call16_from32
+ .global __call16_from32, __call16big_from32
__call16_from32:
pushl %eax
+ // restore data segment limits to 0xffff
+ movl $SEG32_MODE16_DS, %eax
+ movw %ax, %ds
+ movw %ax, %es
+ movw %ax, %ss
+ movw %ax, %fs
+ movw %ax, %gs
+
+ // disable a20
+ inb $PORT_A20, %al
+ andb $~A20_ENABLE_BIT, %al
+ outb %al, $PORT_A20
+
// Jump to 16bit mode
- ljmpw $REAL_MODE_CS, $1f
+ ljmpw $SEG32_MODE16_CS, $1f
- .code16gcc
-1:
- // restore data segment limits to 0xffff
- movw $REAL_MODE_DS, %ax
+__call16big_from32:
+ pushl %eax
+
+ movl $SEG32_MODE16BIG_DS, %eax
movw %ax, %ds
movw %ax, %es
movw %ax, %ss
movw %ax, %fs
movw %ax, %gs
- // reset PE bit in CR0
+ ljmpl $SEG32_MODE16BIG_CS, $(BUILD_BIOS_ADDR + 1f)
+
+ .code16gcc
+1:
+ // Disable protected mode
movl %cr0, %eax
- andb $0xfe, %al
+ andl $~CR0_PE, %eax
movl %eax, %cr0
// far jump to flush CPU queue after transition to real mode
- ljmpw $0xf000, $2f
+ ljmpw $SEG_BIOS, $2f
2:
// restore IDT to normal real-mode defaults
- lidt %cs:rmode_IDT_info
+ lidtw %cs:rmode_IDT_info
// Clear segment registers
xorw %ax, %ax
// Call a 16bit function from 16bit mode with a specified cpu register state
// %eax = address of struct bregs
// Clobbers: all gp registers, es
- .globl __call16
+ .global __call16
__call16:
// Save eax
pushl %eax
// Setup for iretw call
- pushw $0xf000
+ pushw $SEG_BIOS
pushw $1f // return point
- pushw 0x20(%eax) // flags
- pushl 0x1c(%eax) // CS:IP
+ pushw BREGS_flags(%eax) // flags
+ pushl BREGS_ip(%eax) // CS:IP
// Load calling registers.
- movl 0x04(%eax), %edi
- movl 0x08(%eax), %esi
- movl 0x0c(%eax), %ebx
- movl 0x10(%eax), %edx
- movl 0x14(%eax), %ecx
- movw 0x02(%eax), %es // XXX - should load %ds too
- movl 0x18(%eax), %eax
+ movl BREGS_edi(%eax), %edi
+ movl BREGS_esi(%eax), %esi
+ movl BREGS_ebx(%eax), %ebx
+ movl BREGS_edx(%eax), %edx
+ movl BREGS_ecx(%eax), %ecx
+ movw BREGS_es(%eax), %es
+ movw BREGS_ds(%eax), %ds
+ movl %ss:BREGS_eax(%eax), %eax
// Invoke call
iretw // XXX - just do a lcalll
pushfw
pushl %eax
movl 0x06(%esp), %eax
- movl %ecx, %ss:0x14(%eax) // Save %ecx
+ movl %ecx, %ss:BREGS_ecx(%eax)
+ movw %ds, %ss:BREGS_ds(%eax)
movw %ss, %cx
- movw %cx, %ds // Restore %ds == %ss
+ movw %cx, %ds // Restore %ds == %ss
popl %ecx
- movl %ecx, 0x18(%eax) // Save %eax
+ movl %ecx, BREGS_eax(%eax)
popw %cx
- movw %cx, 0x20(%eax) // Save flags
+ movw %cx, BREGS_flags(%eax)
// Store remaining registers
- movw %es, 0x02(%eax)
- movl %edi, 0x04(%eax)
- movl %esi, 0x08(%eax)
- movl %ebx, 0x0c(%eax)
- movl %edx, 0x10(%eax)
+ movw %es, BREGS_es(%eax)
+ movl %edi, BREGS_edi(%eax)
+ movl %esi, BREGS_esi(%eax)
+ movl %ebx, BREGS_ebx(%eax)
+ movl %edx, BREGS_edx(%eax)
// Remove %eax
popl %eax
retl
+// Entry point when a post call looks like a resume.
+// %eax = shutdown status from cmos
+entry_resume:
+ // Save old shutdown status.
+ movl %eax, %ebx
+
+ // Clear shutdown status register.
+ movl $CMOS_RESET_CODE, %eax
+ outb %al, $PORT_CMOS_INDEX
+ xorl %eax, %eax
+ outb %al, $PORT_CMOS_DATA
+
+ // Use a stack in EBDA
+ movw $SEG_BDA, %ax
+ movw %ax, %ds
+ movw BDA_ebda_seg, %ax
+ movw %ax, %ss
+ movw %ax, %ds
+ movl $EBDA_OFFSET_TOP_STACK, %esp
+
+ // Call handler.
+ movl %ebx, %eax
+ cld
+ cli
+ jmp handle_resume
+
+// PnP trampolines
+ .global entry_pnp_real, entry_pnp_prot
+entry_pnp_prot:
+ pushl %esp
+ jmp 1f
+entry_pnp_real:
+ pushl %esp // Backup %esp, then clear high bits
+ movzwl %sp, %esp
+1:
+ pushfl // Save registers clobbered by C code
+ pushl %eax
+ pushl %ecx
+ pushl %edx
+ pushw %es
+ pushw %ds
+ movw %ss, %cx // Move %ss to %ds
+ movw %cx, %ds
+ lea 28(%esp), %eax // %eax points to start of u16 args
+ calll handle_pnp
+ movw %ax, 12(%esp) // Modify %eax to return %ax
+ popw %ds
+ popw %es
+ popl %edx
+ popl %ecx
+ popl %eax
+ popfl
+ popl %esp
+ lretw
// APM trampolines
- .globl apm16protected_entry
+ .global apm16protected_entry
apm16protected_entry:
pushfw // save flags
pushl %eax // dummy
lretw
.code32
- .globl apm32protected_entry
+ .global apm32protected_entry
apm32protected_entry:
pushfw
pushw %cs // Setup for long jump to 16bit mode
addl $4, %esp // pop call address
popfw
lretl
+
+// 32bit elf entry point
+ .global post32
+post32:
+ cli
+ cld
+ lidtl (BUILD_BIOS_ADDR + pmode_IDT_info)
+ lgdtl (BUILD_BIOS_ADDR + rombios32_gdt_48)
+ movl $BUILD_STACK_ADDR, %esp
+ ljmpl $SEG32_MODE32_CS, $_code32__start
+
.code16gcc
+// Shutdown a CPU. We want this in the 0xf000 section to ensure that
+// the code wont be overwritten with something else. (Should
+// something spurious wake up the CPU, we want to be sure that the hlt
+// insn will still be present and will shutdown the CPU.)
+ .global permanent_halt
+permanent_halt:
+ cli
+1: hlt
+ jmp 1b
+
+ // IRQ trampolines
+ .macro IRQ_TRAMPOLINE num
+ .global irq_trampoline_0x\num
+ irq_trampoline_0x\num :
+ int $0x\num
+ lretw
+ .endm
+
+ IRQ_TRAMPOLINE 02
+ IRQ_TRAMPOLINE 10
+ IRQ_TRAMPOLINE 13
+ IRQ_TRAMPOLINE 15
+ IRQ_TRAMPOLINE 16
+ IRQ_TRAMPOLINE 18
+ IRQ_TRAMPOLINE 19
+ IRQ_TRAMPOLINE 1c
+ IRQ_TRAMPOLINE 4a
+
/****************************************************************
- * GDT and IDT tables
+ * Interrupt entry points
+ ****************************************************************/
+
+ // Define an entry point for an interrupt (no args passed).
+ .macro IRQ_ENTRY num
+ .global entry_\num
+ entry_\num :
+ cli // In case something far-calls instead of using "int"
+ ENTRY handle_\num
+ iretw
+ .endm
+
+ // Define an entry point for an interrupt (can read/modify args).
+ .macro IRQ_ENTRY_ARG num
+ .global entry_\num
+ entry_\num :
+ cli // In case something far-calls instead of using "int"
+ ENTRY_ARG handle_\num
+ iretw
+ .endm
+
+ ORG 0xe2c3
+ IRQ_ENTRY nmi
+
+/****************************************************************
+ * GDT and IDT tables (between 0xe2c3 - 0xe3fe)
****************************************************************/
// Protected mode IDT descriptor
// Set base to f0000 to correspond to beginning of BIOS,
// in case I actually define an IDT later
// Set limit to 0
+ .type pmode_IDT_info, @object
pmode_IDT_info:
.word 0x0000 // limit 15:00
.long 0xf0000 // base 16:47
// Set to typical real-mode values.
// base = 000000
// limit = 03ff
+ .type rmode_IDT_info, @object
rmode_IDT_info:
.word 0x03ff // limit 15:00
.long 0 // base 16:47
+ .type rombios32_gdt_48, @object
rombios32_gdt_48:
- .word 0x30
- .word rombios32_gdt
- .word 0x000f
+ .word (rombios32_gdt_end - rombios32_gdt)
+ .long (BUILD_BIOS_ADDR + rombios32_gdt)
.balign 8
+ .type rombios32_gdt, @object
rombios32_gdt:
.word 0, 0, 0, 0
.word 0, 0, 0, 0
- // 32 bit flat code segment (PROTECTED_MODE_CS)
+ // 32 bit flat code segment (SEG32_MODE32_CS)
.word 0xffff, 0, 0x9b00, 0x00cf
- // 32 bit flat data segment (PROTECTED_MODE_DS)
+ // 32 bit flat data segment (SEG32_MODE32_DS)
.word 0xffff, 0, 0x9300, 0x00cf
- // 16 bit code segment base=0xf0000 limit=0xffff (REAL_MODE_CS)
+ // 16 bit code segment base=0xf0000 limit=0xffff (SEG32_MODE16_CS)
.word 0xffff, 0, 0x9b0f, 0x0000
- // 16 bit data segment base=0x0 limit=0xffff (REAL_MODE_DS)
+ // 16 bit data segment base=0x0 limit=0xffff (SEG32_MODE16_DS)
.word 0xffff, 0, 0x9300, 0x0000
+ // 16 bit code segment base=0 limit=0xffffffff (SEG32_MODE16BIG_CS)
+ .word 0xffff, 0, 0x9b00, 0x008f
+ // 16 bit data segment base=0 limit=0xffffffff (SEG32_MODE16BIG_DS)
+ .word 0xffff, 0, 0x9300, 0x008f
+rombios32_gdt_end:
/****************************************************************
- * Interrupt entry points
+ * Interrupt entry points (continued)
****************************************************************/
- // Define an entry point for an interrupt (no args passed).
- .macro IRQ_ENTRY num
- .globl entry_\num
- entry_\num :
- cli // In case something far-calls instead of using "int"
- ENTRY handle_\num
- iretw
- .endm
-
- // Define an entry point for an interrupt (can read/modify args).
- .macro IRQ_ENTRY_ARG num
- .globl entry_\num
- entry_\num :
- cli // In case something far-calls instead of using "int"
- ENTRY_ARG handle_\num
- iretw
- .endm
-
- ORG 0xe2c3
- IRQ_ENTRY nmi
-
- IRQ_ENTRY_ARG 13
- IRQ_ENTRY_ARG 12
- IRQ_ENTRY_ARG 11
- IRQ_ENTRY 76
- IRQ_ENTRY 1c
- IRQ_ENTRY 70
-
ORG 0xe3fe
+ .global entry_13_official
+entry_13_official:
jmp entry_13
ORG 0xe401
+ .type __fdpt, @object
+__fdpt:
// XXX - Fixed Disk Parameter Table
ORG 0xe6f2
+ .global entry_19_official
+entry_19_official:
jmp entry_19
ORG 0xe6f5
.text
ORG 0xe729
+ .type __brgt, @object
+__brgt:
// XXX - Baud Rate Generator Table
ORG 0xe739
IRQ_ENTRY_ARG 14
- IRQ_ENTRY 74
- IRQ_ENTRY 75
-
- // int 18/19 are special - they reset the stack and do not return.
- .globl entry_19
-entry_19:
- RESET_STACK
- ENTRY handle_19
-
- .globl entry_18
-entry_18:
- RESET_STACK
- ENTRY handle_18
-
- // IRQ trampolines
- .macro IRQ_TRAMPOLINE num
- .globl irq_trampoline_0x\num
- irq_trampoline_0x\num :
- int $0x\num
- lretw
- .endm
-
- IRQ_TRAMPOLINE 02
- IRQ_TRAMPOLINE 10
- IRQ_TRAMPOLINE 13
- IRQ_TRAMPOLINE 15
- IRQ_TRAMPOLINE 16
- IRQ_TRAMPOLINE 18
- IRQ_TRAMPOLINE 19
- IRQ_TRAMPOLINE 1c
- IRQ_TRAMPOLINE 4a
-
ORG 0xe82e
IRQ_ENTRY_ARG 16
-entry_hwirq:
- ENTRY handle_hwirq
-
ORG 0xe987
IRQ_ENTRY 09
IRQ_ENTRY_ARG 17
ORG 0xf045
- // XXX int 10
+__int10_0x0f:
+ // XXX - INT 10 Functions 0-Fh Entry Point
iretw
ORG 0xf065
IRQ_ENTRY_ARG 10
ORG 0xf0a4
- // XXX int 1D
- iretw
+ .type __int1d, @object
+__int1d:
+ // XXX - INT 1D - SYSTEM DATA - VIDEO PARAMETER TABLES
+ .space 0x58
- .globl freespace2_start, freespace2_end
+ .global freespace2_start, freespace2_end
freespace2_start:
ORG 0xf841
freespace2_end:
+ .global entry_12_official
+entry_12_official:
jmp entry_12
ORG 0xf84d
+ .global entry_11_official
+entry_11_official:
jmp entry_11
ORG 0xf859
IRQ_ENTRY_ARG 15
+ // Fit other misc defs if the freespace between 0xf859-0xfa6e
+
+ IRQ_ENTRY_ARG 13
+ IRQ_ENTRY_ARG 12
+ IRQ_ENTRY_ARG 11
+ IRQ_ENTRY 76
+ IRQ_ENTRY 1c
+ IRQ_ENTRY 70
+ IRQ_ENTRY 74
+ IRQ_ENTRY 75
+ IRQ_ENTRY hwpic1
+ IRQ_ENTRY hwpic2
+
+ // int 18/19 are special - they reset the stack and do not return.
+entry_19:
+ RESET_STACK
+ pushl $_code32_handle_19
+ jmp transition32
+
+ .global entry_18
+entry_18:
+ RESET_STACK
+ pushl $_code32_handle_18
+ jmp transition32
+
ORG 0xfa6e
.include "out/font.proc.16.s"
.text
IRQ_ENTRY 08
ORG 0xfef3
+__initvector:
// XXX - Initial Interrupt Vector Offsets Loaded by POST
ORG 0xff00
+ .type __copyright, @object
+__copyright:
// XXX - BIOS_COPYRIGHT_STRING
- .ascii "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
+ .asciz "(c) 2002 MandrakeSoft S.A. Written by Kevin Lawton & the Bochs team."
ORG 0xff53
- .globl dummy_iret_handler
+ .global dummy_iret_handler
dummy_iret_handler:
iretw
IRQ_ENTRY_ARG 05
ORG 0xfff0 // Power-up Entry Point
- ljmpw $0xf000, $post16
+ .global reset_vector
+reset_vector:
+ ljmpw $SEG_BIOS, $post16
ORG 0xfff5
+ .type __biosdate, @object
+__biosdate:
// BIOS build date
.ascii "06/23/99"
ORG 0xfffe
+ .type __model_id, @object
+__model_id:
.byte CONFIG_MODEL_ID
+
+ .global bios_checksum
+ .type bios_checksum, @object
+bios_checksum:
.byte 0x00
.end
projects / seabios.git / blobdiff