/* Internal functions */
static void smbus_print_error(unsigned char host_status_register, int loops)
{
-// print_err("some i2c error\r\n");
+// print_err("some i2c error\n");
/* Check if there actually was an error */
if (host_status_register == 0x00 || host_status_register == 0x40 ||
host_status_register == 0x42)
return;
print_err("smbus_error: ");
print_err_hex8(host_status_register);
- print_err("\r\n");
+ print_err("\n");
if (loops >= SMBUS_TIMEOUT) {
- print_err("SMBus Timout\r\n");
+ print_err("SMBus Timout\n");
}
if (host_status_register & (1 << 4)) {
- print_err("Interrup/SMI# was Failed Bus Transaction\r\n");
+ print_err("Interrup/SMI# was Failed Bus Transaction\n");
}
if (host_status_register & (1 << 3)) {
- print_err("Bus Error\r\n");
+ print_err("Bus Error\n");
}
if (host_status_register & (1 << 2)) {
- print_err("Device Error\r\n");
+ print_err("Device Error\n");
}
if (host_status_register & (1 << 1)) {
/* This isn't a real error... */
- print_debug("Interrupt/SMI# was Successful Completion\r\n");
+ print_debug("Interrupt/SMI# was Successful Completion\n");
}
if (host_status_register & (1 << 0)) {
- print_err("Host Busy\r\n");
+ print_err("Host Busy\n");
}
}
}
/* Public functions */
-static unsigned int set_ics_data(unsigned char dev, int data, char len)
-{
- smbus_reset();
- /* clear host data port */
- outb(0x00, SMBHSTDAT0);
- SMBUS_DELAY();
- smbus_wait_until_ready();
-
- /* read to reset block transfer counter */
- inb(SMBHSTCTL);
-
- /* fill blocktransfer array */
- if (dev == 0xd2) {
- //char d2_data[] = {0x0d,0x00,0x3f,0xcd,0x7f,0xbf,0x1a,0x2a,0x01,0x0f,0x0b,0x00,0x8d,0x9b};
- outb(0x0d, SMBBLKDAT);
- outb(0x00, SMBBLKDAT);
- outb(0x3f, SMBBLKDAT);
- outb(0xcd, SMBBLKDAT);
- outb(0x7f, SMBBLKDAT);
- outb(0xbf, SMBBLKDAT);
- outb(0x1a, SMBBLKDAT);
- outb(0x2a, SMBBLKDAT);
- outb(0x01, SMBBLKDAT);
- outb(0x0f, SMBBLKDAT);
- outb(0x0b, SMBBLKDAT);
- outb(0x80, SMBBLKDAT);
- outb(0x8d, SMBBLKDAT);
- outb(0x9b, SMBBLKDAT);
- } else {
- //char d4_data[] = {0x08,0xff,0x3f,0x00,0x00,0xff,0xff,0xff,0xff};
- outb(0x08, SMBBLKDAT);
- outb(0xff, SMBBLKDAT);
- outb(0x3f, SMBBLKDAT);
- outb(0x00, SMBBLKDAT);
- outb(0x00, SMBBLKDAT);
- outb(0xff, SMBBLKDAT);
- outb(0xff, SMBBLKDAT);
- outb(0xff, SMBBLKDAT);
- outb(0xff, SMBBLKDAT);
- }
-
- //for (i=0; i < len; i++)
- // outb(data[i],SMBBLKDAT);
-
- outb(dev, SMBXMITADD);
- outb(0, SMBHSTCMD);
- outb(len, SMBHSTDAT0);
- outb(0x74, SMBHSTCTL);
-
- SMBUS_DELAY();
-
- smbus_wait_until_ready();
-
- smbus_reset();
- return 0;
-}
static unsigned int get_spd_data(unsigned int dimm, unsigned int offset)
{
if (dev == PCI_DEV_INVALID) {
/* This won't display text if enable_smbus() is before serial init */
- die("Power Managment Controller not found\r\n");
+ die("Power Managment Controller not found\n");
}
/* Set clock source */
/* Make it work for I/O ... */
pci_write_config16(dev, 0x04, 0x0003);
- /*
- coreboot hangs at this two lines after os reboot(this even happen after I change os
- reboot to cold reboot, this also interfere S3 wakeup) */
- /* Setup clock chips */
- //set_ics_data(0xd2, 0, 14);
- //set_ics_data(0xd4, 0, 9);
-
smbus_reset();
/* clear host data port */
outb(0x00, SMBHSTDAT0);
}
/**
- * A fixup for some systems that need time for the SMBus to "warm up". This is
- * needed on some VT823x based systems, where the SMBus spurts out bad data for
- * a short time after power on. This has been seen on the VIA Epia series and
- * Jetway J7F2-series. It reads the ID byte from SMBus, looking for
+ * A fixup for some systems that need time for the SMBus to "warm up". This is
+ * needed on some VT823x based systems, where the SMBus spurts out bad data for
+ * a short time after power on. This has been seen on the VIA Epia series and
+ * Jetway J7F2-series. It reads the ID byte from SMBus, looking for
* known-good data from a slot/address. Exits on either good data or a timeout.
*
* TODO: This should probably go into some global file, but one would need to
* be created just for it. If some other chip needs/wants it, we can
* worry about it then.
*
- * @param ctrl The memory controller and SMBus addresses.
+ * @param mem_ctrl The memory controller and SMBus addresses.
*/
-void smbus_fixup(const struct mem_controller *ctrl)
+static void smbus_fixup(const struct mem_controller *mem_ctrl)
{
int i, ram_slots, current_slot = 0;
u8 result = 0;
- ram_slots = ARRAY_SIZE(ctrl->channel0);
+ ram_slots = ARRAY_SIZE(mem_ctrl->channel0);
if (!ram_slots) {
- print_err("smbus_fixup() thinks there are no RAM slots!\r\n");
+ print_err("smbus_fixup() thinks there are no RAM slots!\n");
return;
}
if (current_slot > ram_slots)
current_slot = 0;
- result = get_spd_data(ctrl->channel0[current_slot],
+ result = get_spd_data(mem_ctrl->channel0[current_slot],
SPD_MEMORY_TYPE);
current_slot++;
PRINT_DEBUG(".");
}
if (i >= SMBUS_TIMEOUT)
- print_err("SMBus timed out while warming up\r\n");
+ print_err("SMBus timed out while warming up\n");
else
- PRINT_DEBUG("Done\r\n");
+ PRINT_DEBUG("Done\n");
}
/* Debugging Function */
for (dimm = 0; dimm < 8; dimm++) {
print_debug("SPD Data for DIMM ");
print_debug_hex8(dimm);
- print_debug("\r\n");
+ print_debug("\n");
val = get_spd_data(dimm, 0);
if (val == 0xff) {
} else if (val == 0x80) {
regs = 128;
} else {
- print_debug("No DIMM present\r\n");
+ print_debug("No DIMM present\n");
regs = 0;
}
for (offset = 0; offset < regs; offset++) {
print_debug_hex8(offset);
print_debug(" = 0x");
print_debug_hex8(get_spd_data(dimm, offset));
- print_debug("\r\n");
+ print_debug("\n");
}
}
}
projects / coreboot.git / blobdiff