#include "northbridge.h"
/*
- * This fixup is based on capturing values from an Award bios. Without
+ * This fixup is based on capturing values from an Award BIOS. Without
* this fixup the DMA write performance is awful (i.e. hdparm -t /dev/hda is 20x
* slower than normal, ethernet drops packets).
* Apparently these registers govern some sort of bus master behavior.
*/
-#if 0
-static void dump_dev(device_t dev)
-{
- int i,j;
-
- for(i = 0; i < 256; i += 16) {
- printk_debug("0x%x: ", i);
- for(j = 0; j < 16; j++) {
- printk_debug("%02x ", pci_read_config8(dev, i+j));
- }
- printk_debug("\n");
- }
-}
-#endif
-static void northbridge_init(device_t dev)
+static void northbridge_init(device_t dev)
{
device_t fb_dev;
unsigned long fb;
unsigned char c;
- printk_debug("VT8623 random fixup ...\n");
+ printk(BIOS_DEBUG, "VT8623 random fixup ...\n");
pci_write_config8(dev, 0x0d, 0x08);
pci_write_config8(dev, 0x70, 0x82);
pci_write_config8(dev, 0x71, 0xc8);
pci_write_config8(dev, 0x84, 0x80);
pci_write_config16(dev, 0x80, 0x610f);
pci_write_config32(dev, 0x88, 0x00000002);
-
+
fb_dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3122, 0);
if (fb_dev) {
/* Fixup GART and framebuffer addresses properly.
*/
//fb = pci_read_config32(dev, 0x10); /* Base addres of framebuffer */
fb = 0xd0000000;
- printk_debug("Frame buffer at %8x\n",fb);
+ printk(BIOS_DEBUG, "Frame buffer at %8lx\n",fb);
c = pci_read_config8(dev, 0xe1) & 0xf0; /* size of vga */
c |= fb>>28; /* upper nibble of frame buffer address */
pci_write_config8(dev, 0xe0, c);
pci_write_config8(dev, 0xe2, 0x42); /* 'cos award does */
}
- //dump_dev(dev);
}
-static void nullfunc(){}
+static void nullfunc(device_t dev)
+{
+ /* Nothing to do */
+}
static struct device_operations northbridge_operations = {
.read_resources = nullfunc,
static void agp_init(device_t dev)
{
- printk_debug("VT8623 AGP random fixup ...\n");
+ printk(BIOS_DEBUG, "VT8623 AGP random fixup ...\n");
pci_write_config8(dev, 0x3e, 0x0c);
pci_write_config8(dev, 0x40, 0x83);
pci_write_config8(dev, 0x43, 0x44);
pci_write_config8(dev, 0x44, 0x34);
pci_write_config8(dev, 0x83, 0x02);
- //dump_dev(dev);
}
static struct device_operations agp_operations = {
.device = PCI_DEVICE_ID_VIA_8633_1,
};
-static void vga_init(device_t dev)
-{
-// unsigned long fb;
- msr_t clocks1,clocks2,instructions,setup;
-
- printk_debug("VGA random fixup ...\n");
- pci_write_config8(dev, 0x04, 0x07);
- pci_write_config8(dev, 0x0d, 0x20);
- pci_write_config32(dev,0x10,0xd8000008);
- pci_write_config32(dev,0x14,0xdc000000);
-
- //dump_dev(dev);
-
- // set up performnce counters for debugging vga init sequence
- //setup.lo = 0x1c0; // count instructions
- //wrmsr(0x187,setup);
- //instructions.hi = 0;
- //instructions.lo = 0;
- //wrmsr(0xc2,instructions);
- //clocks1 = rdmsr(0x10);
-
-
-#if 0
- /* code to make vga init go through the emulator - as of yet this does not workfor the epia-m */
- dev->on_mainboard=1;
- dev->rom_address = (void *)0xfffc0000;
-
- pci_dev_init(dev);
-
- call_bios_interrupt(0x10,0x4f1f,0x8003,1,0);
-
- //clocks2 = rdmsr(0x10);
- //instructions = rdmsr(0xc2);
-
- printk_debug("Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
- printk_debug("Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
- printk_debug("Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
-
-#else
-
- /* code to make vga init run in real mode - does work but against the current coreboot philosophy */
- printk_debug("INSTALL REAL-MODE IDT\n");
- setup_realmode_idt();
- printk_debug("DO THE VGA BIOS\n");
- do_vgabios();
-
- //clocks2 = rdmsr(0x10);
- //instructions = rdmsr(0xc2);
-
- //printk_debug("Clocks 1 = %08x:%08x\n",clocks1.hi,clocks1.lo);
- //printk_debug("Clocks 2 = %08x:%08x\n",clocks2.hi,clocks2.lo);
- //printk_debug("Instructions = %08x:%08x\n",instructions.hi,instructions.lo);
-
- vga_enable_console();
-
-#endif
-
-
- pci_write_config32(dev,0x30,0);
-
- /* Set the vga mtrrs - disable for the moment as the add_var_mtrr function has vapourised */
-#if 0
- add_var_mtrr( 0xd0000000 >> 10, 0x08000000>>10, MTRR_TYPE_WRCOMB);
- fb = pci_read_config32(dev,0x10); // get the fb address
- add_var_mtrr( fb>>10, 8192, MTRR_TYPE_WRCOMB);
-#endif
-}
-
-static void vga_read_resources(device_t dev)
-{
-
- dev->rom_address = (void *)0xfffc0000;
- dev->on_mainboard=1;
- pci_dev_read_resources(dev);
-
-}
-
-static struct device_operations vga_operations = {
- .read_resources = vga_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = vga_init,
- .ops_pci = 0,
-};
-
-static const struct pci_driver vga_driver __pci_driver = {
- .ops = &vga_operations,
- .vendor = PCI_VENDOR_ID_VIA,
- .device = 0x3122,
-};
-
-
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
- struct resource *resource;
-
- printk_spew("Entering vt8623 pci_domain_read_resources.\n");
-
- /* Initialize the system wide io space constraints */
- resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
- resource->limit = 0xffffUL;
- resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
- IORESOURCE_ASSIGNED;
-
- /* Initialize the system wide memory resources constraints */
- resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
- resource->limit = 0xffffffffULL;
- resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
- IORESOURCE_ASSIGNED;
-
- printk_spew("Leaving vt8623 pci_domain_read_resources.\n");
-}
-
static void ram_resource(device_t dev, unsigned long index,
unsigned long basek, unsigned long sizek)
{
return tolm;
}
+#if CONFIG_WRITE_HIGH_TABLES==1
+/* maximum size of high tables in KB */
+#define HIGH_TABLES_SIZE 64
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
static void pci_domain_set_resources(device_t dev)
{
static const uint8_t ramregs[] = {0x5a, 0x5b, 0x5c, 0x5d };
device_t mc_dev;
uint32_t pci_tolm;
- printk_spew("Entering vt8623 pci_domain_set_resources.\n");
+ printk(BIOS_SPEW, "Entering vt8623 pci_domain_set_resources.\n");
pci_tolm = find_pci_tolm(&dev->link[0]);
mc_dev = dev->link[0].children;
unsigned char rambits;
int i, idx;
- for(rambits = 0, i = 0; i < sizeof(ramregs)/sizeof(ramregs[0]); i++) {
+ for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
unsigned char reg;
reg = pci_read_config8(mc_dev, ramregs[i]);
- /* these are ENDING addresses, not sizes.
+ /* these are ENDING addresses, not sizes.
* if there is memory in this slot, then reg will be > rambits.
- * So we just take the max, that gives us total.
+ * So we just take the max, that gives us total.
* We take the highest one to cover for once and future coreboot
* bugs. We warn about bugs.
*/
if (reg > rambits)
rambits = reg;
if (reg < rambits)
- printk_err("ERROR! register 0x%x is not set!\n",
+ printk(BIOS_ERR, "ERROR! register 0x%x is not set!\n",
ramregs[i]);
}
- printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024);
+ printk(BIOS_DEBUG, "I would set ram size to 0x%x Kbytes\n", (rambits)*16*1024);
tomk = rambits*16*1024 - 32768;
/* Compute the top of Low memory */
tolmk = pci_tolm >> 10;
*/
tolmk = tomk;
}
+
+#if CONFIG_WRITE_HIGH_TABLES == 1
+ high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+ high_tables_size = HIGH_TABLES_SIZE* 1024;
+ printk(BIOS_DEBUG, "tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size);
+#endif
+
/* Report the memory regions */
idx = 10;
ram_resource(dev, idx++, 0, 640); /* first 640k */
assign_resources(&dev->link[0]);
}
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
- printk_spew("Entering vt8623 pci_domain_scan_bus.\n");
-
- max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
- return max;
-}
-
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.scan_bus = pci_domain_scan_bus,
-};
+};
static void cpu_bus_init(device_t dev)
{
static void enable_dev(struct device *dev)
{
- printk_spew("In vt8623 enable_dev for device %s.\n", dev_path(dev));
+ printk(BIOS_SPEW, "In vt8623 enable_dev for device %s.\n", dev_path(dev));
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
projects / coreboot.git / blobdiff