Some more DIMM0 related cleanups and deduplication.

[coreboot.git] / src / northbridge / intel / i855 / raminit.h

diff --git a/src/northbridge/intel/i855/raminit.h b/src/northbridge/intel/i855/raminit.h
index dbd0be6927751a967a48969a80c827421b3a95ac..2ac0fde62dc8812371dba2c703133723869c440b 100644 (file)
--- a/src/northbridge/intel/i855/raminit.h
+++ b/src/northbridge/intel/i855/raminit.h
@@ -18,9 +18,14 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#ifndef RAMINIT_H
-#define RAMINIT_H
+#ifndef NORTHBRIDGE_INTEL_I855_RAMINIT_H
+#define NORTHBRIDGE_INTEL_I855_RAMINIT_H
 
+/* i855 Northbridge PCI device */
+#define NORTHBRIDGE         PCI_DEV(0, 0, 0)
+#define NORTHBRIDGE_MMC     PCI_DEV(0, 0, 1)
+
+/* The i855 supports max. 2 dual-sided SO-DIMMs. */
 #define DIMM_SOCKETS 2
 
 struct mem_controller {
@@ -30,5 +35,4 @@ struct mem_controller {
 
 void sdram_initialize(int controllers, const struct mem_controller *ctrl);
 
-
-#endif /* RAMINIT_H */
+#endif /* NORTHBRIDGE_INTEL_I855_RAMINIT_H */