Add high tables support to all northbridges.

[coreboot.git] / src / northbridge / intel / i82830 / northbridge.c

diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 689bf19bc2dfcca4c814488b8b3c3e76d27b3ede..bf79ecdca1dd6666e24bac52382bb66d2b08e279 100644 (file)
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -107,6 +107,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
        return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 static void pci_domain_set_resources(device_t dev)
 {
        device_t mc_dev;
@@ -144,6 +148,12 @@ static void pci_domain_set_resources(device_t dev)
                idx = 10;
                ram_resource(dev, idx++, 0, 640);
                ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+               /* Leave some space for ACPI, PIRQ and MP tables */
+               high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+               high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
        }
        assign_resources(&dev->link[0]);
 }