Factor out a few commonly duplicated functions from northbridge.c.

[coreboot.git] / src / northbridge / intel / i3100 / northbridge.c

diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index 0a04faf61a9780ca23b7dd5f7f52415f5e608b46..53b1dd7bd261cd5448d3b401f891f4b3cc2917b5 100644 (file)
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -37,42 +37,6 @@
 
 static u32 max_bus;
 
-static void ram_resource(device_t dev, u32 index,
-       u32 basek, u32 sizek)
-{
-       struct resource *resource;
-
-       resource = new_resource(dev, index);
-       resource->base  = ((resource_t)basek) << 10;
-       resource->size  = ((resource_t)sizek) << 10;
-       resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
-               IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-}
-
-static void tolm_test(void *gp, struct device *dev, struct resource *new)
-{
-       struct resource **best_p = gp;
-       struct resource *best;
-       best = *best_p;
-       if (!best || (best->base > new->base)) {
-               best = new;
-       }
-       *best_p = best;
-}
-
-static u32 find_pci_tolm(struct bus *bus)
-{
-       struct resource *min;
-       u32 tolm;
-       min = 0;
-       search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
-       tolm = 0xffffffffUL;
-       if (min && tolm > min->base) {
-               tolm = min->base;
-       }
-       return tolm;
-}
-
 #if CONFIG_WRITE_HIGH_TABLES==1
 #define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
 extern uint64_t high_tables_base, high_tables_size;
@@ -83,17 +47,17 @@ static void pci_domain_set_resources(device_t dev)
        device_t mc_dev;
        u32 pci_tolm;
 
-        pci_tolm = find_pci_tolm(&dev->link[0]);
+        pci_tolm = find_pci_tolm(dev->link_list);
 
 #if 1
-       printk_debug("PCI mem marker = %x\n", pci_tolm);
+       printk(BIOS_DEBUG, "PCI mem marker = %x\n", pci_tolm);
 #endif
        /* FIXME Me temporary hack */
        if(pci_tolm > 0xe0000000)
                pci_tolm = 0xe0000000;
        /* Ensure pci_tolm is 128M aligned */
        pci_tolm &= 0xf8000000;
-       mc_dev = dev->link[0].children;
+       mc_dev = dev->link_list->children;
        if (mc_dev) {
                /* Figure out which areas are/should be occupied by RAM.
                 * This is all computed in kilobytes and converted to/from
@@ -172,7 +136,7 @@ static void pci_domain_set_resources(device_t dev)
                high_tables_size = HIGH_TABLES_SIZE * 1024;
 #endif
        }
-       assign_resources(&dev->link[0]);
+       assign_resources(dev->link_list);
 }
 
 static u32 i3100_domain_scan_bus(device_t dev, u32 max)
@@ -184,8 +148,8 @@ static u32 i3100_domain_scan_bus(device_t dev, u32 max)
 static struct device_operations pci_domain_ops = {
        .read_resources   = pci_domain_read_resources,
        .set_resources    = pci_domain_set_resources,
-       .enable_resources = enable_childrens_resources,
-       .init             = 0,
+       .enable_resources = NULL,
+       .init             = NULL,
        .scan_bus         = i3100_domain_scan_bus,
        .ops_pci_bus      = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
 };
@@ -204,9 +168,8 @@ static void mc_read_resources(device_t dev)
 
 static void mc_set_resources(device_t dev)
 {
-       struct resource *resource, *last;
+       struct resource *resource;
 
-       last = &dev->resource[dev->resources];
        resource = find_resource(dev, 0xcf);
        if (resource) {
                report_resource_stored(dev, resource, "<mmconfig>");
@@ -241,7 +204,7 @@ static const struct pci_driver mc_driver __pci_driver = {
 
 static void cpu_bus_init(device_t dev)
 {
-        initialize_cpus(&dev->link[0]);
+        initialize_cpus(dev->link_list);
 }
 
 static void cpu_bus_noop(device_t dev)