This, ladies and gentlement, is commit #4000.
[coreboot.git] / src / northbridge / amd / amdk8 / northbridge.c
index afe18a125559a50149c600bed97c2e640b915316..c2c89d1ffb8d35737e1789a6e9189494ba40632b 100644 (file)
 #include <string.h>
 #include <bitops.h>
 #include <cpu/cpu.h>
-#include <cpu/amd/model_fxx_rev.h>
 
 #include <cpu/x86/lapic.h>
 
-#if CONFIG_LOGICAL_CPUS==1
 #include <cpu/amd/dualcore.h>
+#if CONFIG_LOGICAL_CPUS==1
 #include <pc80/mc146818rtc.h>
 #endif
 
@@ -31,9 +30,7 @@
 
 #include "amdk8.h"
 
-#if HW_MEM_HOLE_SIZEK != 0
 #include <cpu/amd/model_fxx_rev.h>
-#endif
 
 #include <cpu/amd/amdk8_sysconf.h>
 
@@ -99,7 +96,7 @@ static void f1_write_config32(unsigned reg, uint32_t value)
 
 static unsigned int amdk8_nodeid(device_t dev)
 {
-       return (dev->path.u.pci.devfn >> 3) - 0x18;
+       return (dev->path.pci.devfn >> 3) - 0x18;
 }
 
 static unsigned int amdk8_scan_chain(device_t dev, unsigned nodeid, unsigned link, unsigned sblink, unsigned int max, unsigned offset_unitid)
@@ -474,7 +471,7 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
                limit |= (nodeid & 7);
 
                if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
-                       printk_spew("%s, enabling legacy VGA IO forwarding for %s link %s\n",
+                       printk_spew("%s, enabling legacy VGA IO forwarding for %s link 0x%x\n",
                                    __func__, dev_path(dev), link);
                        base |= PCI_IO_BASE_VGA_EN;
                }
@@ -897,6 +894,11 @@ static uint32_t hoist_memory(unsigned long hole_startk, int i)
 }
 #endif
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 #if CONFIG_PCI_64BIT_PREF_MEM == 1
@@ -1076,6 +1078,15 @@ static void pci_domain_set_resources(device_t dev)
                                        ram_resource(dev, (idx | i), basek, pre_sizek);
                                        idx += 0x10;
                                        sizek -= pre_sizek;
+#if HAVE_HIGH_TABLES==1
+                                       if (i==0 && high_tables_base==0) {
+                                       /* Leave some space for ACPI, PIRQ and MP tables */
+                                               high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+                                               high_tables_size = HIGH_TABLES_SIZE * 1024;
+                                               printk_debug("(split)%xK table at =%08llx\n", HIGH_TABLES_SIZE,
+                                                            high_tables_base);
+                                       }
+#endif
                                }
                                #if HW_MEM_HOLE_SIZEK != 0
                                if(reset_memhole)
@@ -1095,10 +1106,24 @@ static void pci_domain_set_resources(device_t dev)
                                sizek -= (4*1024*1024 - mmio_basek);
                        }
                }
-               ram_resource(dev, (idx | i), basek, sizek);
+               /* If sizek == 0, it was split at mmio_basek without a hole.
+                * Don't create an empty ram_resource.
+                */
+               if (sizek)
+                       ram_resource(dev, (idx | i), basek, sizek);
                idx += 0x10;
+#if HAVE_HIGH_TABLES==1
+               printk_debug("%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
+                            i, mmio_basek, basek, limitk);
+               if (i==0 && high_tables_base==0) {
+               /* Leave some space for ACPI, PIRQ and MP tables */
+                       high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+                       high_tables_size = HIGH_TABLES_SIZE * 1024;
+               }
+#endif
        }
        assign_resources(&dev->link[0]);
+
 }
 
 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
@@ -1278,7 +1303,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
 
                        /* Build the cpu device path */
                        cpu_path.type = DEVICE_PATH_APIC;
-                       cpu_path.u.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:8);
+                       cpu_path.apic.apic_id = i * (nb_cfg_54?(siblings+1):1) + j * (nb_cfg_54?1:8);
 
                        /* See if I can find the cpu */
                        cpu = find_dev_path(cpu_bus, &cpu_path);
@@ -1300,15 +1325,15 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
 
                        /* Report what I have done */
                        if (cpu) {
-                               cpu->path.u.apic.node_id = i;
-                               cpu->path.u.apic.core_id = j;
+                               cpu->path.apic.node_id = i;
+                               cpu->path.apic.core_id = j;
                                if(sysconf.enabled_apic_ext_id) {
                                        if(sysconf.lift_bsp_apicid) {
-                                               cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+                                               cpu->path.apic.apic_id += sysconf.apicid_offset;
                                        } else
                                        {
-                                              if (cpu->path.u.apic.apic_id != 0)
-                                                      cpu->path.u.apic.apic_id += sysconf.apicid_offset;
+                                              if (cpu->path.apic.apic_id != 0)
+                                                      cpu->path.apic.apic_id += sysconf.apicid_offset;
                                        }
                                }
                                printk_debug("CPU: %s %s\n",