- First stab at getting the ppc ports building and working.

[coreboot.git] / src / northbridge / amd / amdk8 / northbridge.c

diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 85f8fe4e869d55731181e515a918c2a1084b7101..464e66c51fccfde8141a7893156f7a4b6efc2db0 100644 (file)
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -657,6 +657,7 @@ static struct device_operations pci_domain_ops = {
        .enable_resources = enable_childrens_resources,
        .init             = 0,
        .scan_bus         = pci_domain_scan_bus,
+       .ops_pci_bus      = &pci_cf8_conf1,
 };
 
 static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
@@ -726,7 +727,6 @@ static void root_complex_enable_dev(struct device *dev)
        /* Set the operations if it is a special bus type */
        if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
                dev->ops = &pci_domain_ops;
-               pci_set_method_conf1();
        }
        else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
                dev->ops = &cpu_bus_ops;