Update equivalent processor revision ID to load latest microcode patches and
[coreboot.git] / src / northbridge / amd / amdfam10 / northbridge.c
index 92f9ea3819429a16ee09a1c2f338eb260fb9f7c6..6a9504ccc13fb1d2c08c0b8dc3bef8156c520fd0 100644 (file)
@@ -911,6 +911,11 @@ static void disable_hoist_memory(unsigned long hole_startk, int i)
 
 #endif
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64    // maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 #if CONFIG_PCI_64BIT_PREF_MEM == 1
@@ -1084,6 +1089,15 @@ static void pci_domain_set_resources(device_t dev)
                                        ram_resource(dev, (idx | i), basek, pre_sizek);
                                        idx += 0x10;
                                        sizek -= pre_sizek;
+#if HAVE_HIGH_TABLES==1
+                                       if (i==0 && high_tables_base==0) {
+                                       /* Leave some space for ACPI, PIRQ and MP tables */
+                                               high_tables_base = (mmio_basek - HIGH_TABLES_SIZE) * 1024;
+                                               high_tables_size = HIGH_TABLES_SIZE * 1024;
+                                               printk_debug("(split)%xK table at =%08llx\n", HIGH_TABLES_SIZE,
+                                                            high_tables_base);
+                                       }
+#endif
                                }
                                #if CONFIG_AMDMCT == 0
                                #if HW_MEM_HOLE_SIZEK != 0
@@ -1108,6 +1122,15 @@ static void pci_domain_set_resources(device_t dev)
                }
                ram_resource(dev, (idx | i), basek, sizek);
                idx += 0x10;
+#if HAVE_HIGH_TABLES==1
+               printk_debug("%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
+                            i, mmio_basek, basek, limitk);
+               if (i==0 && high_tables_base==0) {
+               /* Leave some space for ACPI, PIRQ and MP tables */
+                       high_tables_base = (limitk - HIGH_TABLES_SIZE) * 1024;
+                       high_tables_size = HIGH_TABLES_SIZE * 1024;
+               }
+#endif
        }
 
        for(link = 0; link < dev->links; link++) {