Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / winent / pl6064 / romstage.c

diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c
index 6d081e94576ac4d553724f62a1fe01268429f520..becd698c0a83ef6adf74941568ceac8beba57823 100644 (file)
--- a/src/mainboard/winent/pl6064/romstage.c
+++ b/src/mainboard/winent/pl6064/romstage.c
@@ -33,13 +33,12 @@
 #include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include <spd.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 
+#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+
 static inline int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);
@@ -57,17 +56,12 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #include "cpu/amd/model_lx/syspreinit.c"
 #include "cpu/amd/model_lx/msrinit.c"
 
-static void mb_gpio_init(void)
-{
-       /* Early mainboard specific GPIO setup. */
-}
-
 void main(unsigned long bist)
 {
        post_code(0x01);
 
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}
+               {.channel0 = {DIMM0, DIMM1}}
        };
 
        SystemPreInit();
@@ -80,7 +74,6 @@ void main(unsigned long bist)
         */
        w83627hf_set_clksel_48(SERIAL_DEV);
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-       mb_gpio_init();
        uart_init();
        console_init();
 
@@ -99,4 +92,3 @@ void main(unsigned long bist)
        /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
        return;
 }
-