Since some people disapprove of white space cleanups mixed in regular commits
[coreboot.git] / src / mainboard / via / vt8454c / romstage.c
index 0680fe1b2a772c549eb9b5f06d92cb06befb4629..1a1efbf8f6f6b146bc1440136c8d58fde7f84449 100644 (file)
@@ -1,6 +1,6 @@
 /*
  * This file is part of the coreboot project.
- * 
+ *
  * Copyright (C) 2007-2009 coresystems GmbH
  *
  * This program is free software; you can redistribute it and/or
 #include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/via/cx700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 
-#define DEACTIVATE_CAR 1
-#define DEACTIVATE_CAR_FILE "cpu/via/car/cache_as_ram_post.c"
-#include "cpu/x86/car/copy_and_run.c"
+
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/via/cx700/cx700_early_smbus.c"
-#include "debug.c"
+#include "lib/debug.c"
 
 #include "northbridge/via/cx700/cx700_early_serial.c"
 #include "northbridge/via/cx700/raminit.c"
@@ -53,7 +49,7 @@ static void enable_mainboard_devices(void)
        if (dev == PCI_DEV_INVALID) {
                die("LPC bridge not found!!!\n");
        }
-       // Disable GP3 
+       // Disable GP3
        pci_write_config8(dev, 0x98, 0x00);
 
        // Disable mc97
@@ -91,7 +87,7 @@ static void enable_shadow_ram(const struct mem_controller *ctrl)
        pci_write_config8(PCI_DEV(0, 0, 3), 0x83, shadowreg);
 }
 
-static void main(unsigned long bist)
+void main(unsigned long bist)
 {
        /* Set statically so it should work with cx700 as well */
        static const struct mem_controller cx700[] = {
@@ -117,16 +113,5 @@ static void main(unsigned long bist)
        sdram_set_registers(cx700);
        enable_shadow_ram(cx700);
        sdram_enable(cx700);
-
-#ifdef DEACTIVATE_CAR
-       print_debug("Deactivating CAR");
-#include DEACTIVATE_CAR_FILE
-       print_debug(" - Done.\n");
-#endif
-       copy_and_run(0);
-}
-
-void amd64_main(unsigned long bist) {
-       main(bist);
 }