make early_mtrr_init() invisible for cache as ram targets as it breaks them.

[coreboot.git] / src / mainboard / via / pc2500e / romstage.c

diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 32a853cdb30be6e75cab07ce6efc69bc438224b1..90913e1710aa95b7609ff5f3994232edce48d6a8 100644 (file)
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -67,9 +67,6 @@ void main(unsigned long bist)
        enable_smbus();
        smbus_fixup(&ctrl);
 
-       if (bist == 0)
-               early_mtrr_init();
-
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);