Drop excessive whitespace randomly sprinkled in romstage.c files.

[coreboot.git] / src / mainboard / via / pc2500e / romstage.c

diff --git a/src/mainboard/via/pc2500e/romstage.c b/src/mainboard/via/pc2500e/romstage.c
index 71d916a82d3efb488c7f0f59ce5455a394bf3051..3aa599bb49008a4ec44174b08570caf9a91ecabb 100644 (file)
--- a/src/mainboard/via/pc2500e/romstage.c
+++ b/src/mainboard/via/pc2500e/romstage.c
@@ -25,17 +25,16 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "option_table.h"
-#include "pc80/mc146818rtc_early.c"
+#include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
+#include <lib.h>
 #include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "superio/ite/it8716f/it8716f_early_serial.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1)
 
@@ -53,7 +52,7 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 }, /* TODO: CN700 currently only supports 1 DIMM. */
+       .channel0 = { DIMM0 }, /* TODO: CN700 currently only supports 1 DIMM. */
 };
 
 void main(unsigned long bist)
@@ -68,9 +67,6 @@ void main(unsigned long bist)
        enable_smbus();
        smbus_fixup(&ctrl);
 
-       if (bist == 0)
-               early_mtrr_init();
-
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);
 
@@ -78,4 +74,3 @@ void main(unsigned long bist)
 
        /* ram_check(0, 640 * 1024); */
 }
-