Drop excessive whitespace randomly sprinkled in romstage.c files.

[coreboot.git] / src / mainboard / via / epia-n / romstage.c

diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c
index 9abef9b9623cddc23154dc93279ad9d5741d44f3..449fe95ff1b793b5089d8f0d095dfbb86b60748f 100644 (file)
--- a/src/mainboard/via/epia-n/romstage.c
+++ b/src/mainboard/via/epia-n/romstage.c
@@ -26,8 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
 #include "lib/ramtest.c"
 #include "northbridge/via/cn400/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -37,13 +36,10 @@
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "superio/winbond/w83697hf/w83697hf_early_serial.c"
+#include <spd.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
 
-/*
- * NOOB ::                     
- * d0f0 - Device 0 Function 0 etc. 
- */
 static const struct mem_controller ctrl = {
        .d0f0 = 0x0000,
        .d0f2 = 0x2000,
@@ -51,13 +47,9 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 },
+       .channel0 = { DIMM0 },
 };
 
-static void memreset_setup(void)
-{
-}
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
@@ -69,7 +61,7 @@ static void enable_mainboard_devices(void)
 {
        device_t dev;
        u8 reg;
- 
+
        dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");
@@ -99,10 +91,10 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x51, 0x9d);
 }
 
-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)
 {
        unsigned char shadowreg;
-       
+
        shadowreg = pci_read_config8(ctrl.d0f3, 0x82);
        /* 0xf0000-0xfffff Read/Write*/
        shadowreg |= 0x30;
@@ -137,10 +129,10 @@ static void main(unsigned long bist)
 
        print_debug("Enable F-ROM Shadow RAM\n");
        enable_shadow_ram();
-       
+
        /* setup cpu */
        print_debug("Setup CPU Interface\n");
-       c3_cpu_setup(ctrl.d0f2);        
+       c3_cpu_setup(ctrl.d0f2);
 
        ddr_ram_setup();
 
@@ -148,9 +140,8 @@ static void main(unsigned long bist)
                print_debug("doing early_mtrr\n");
                early_mtrr_init();
        }
-       
+
        //ram_check(0, 640 * 1024);
 
        print_spew("Leaving romstage.c:main()\n");
 }
-