Simplify a few code chunks, fix whitespace and indentation.

[coreboot.git] / src / mainboard / via / epia-m700 / romstage.c

diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index ac2e202d6aec28b96d4cb2aaa9bfd15389032e51..6d0957049becd8b3fb3cb63f30f409683b9ba43d 100644 (file)
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -22,8 +22,6 @@
  * and acpi_is_wakeup_early_via_VX800() is part of Rudolf's S3 patch.
  */
 
-#define RAMINIT_SYSINFO 1
-#define CACHE_AS_RAM_ADDRESS_DEBUG 0
 #define PAYLOAD_IS_SEABIOS 0
 
 #include <stdint.h>
@@ -33,24 +31,18 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "console/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
+#include <lib.h>
 #include "northbridge/via/vx800/vx800.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include <string.h>
-
 /* This file contains the board-special SI value for raminit.c. */
 #include "driving_clk_phase_data.c"
-
 #include "northbridge/via/vx800/raminit.h"
 #include "northbridge/via/vx800/raminit.c"
-
 #include "wakeup.h"
-
 #include "superio/winbond/w83697hf/w83697hf_early_serial.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
@@ -456,17 +448,6 @@ void main(unsigned long bist)
        /* This fix does help vx800!, but vx855 doesn't need this. */
        /* smbus_fixup(&ctrl); */
 
-       if (bist == 0) {
-               /*
-                * CAR needs MTRR until memory is ok, so disable this
-                * early_mtrr_init() call.
-                */
-#if 0
-                print_debug("doing early_mtrr\n");
-                early_mtrr_init();
-#endif
-       }
-
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);
 
@@ -680,8 +661,5 @@ void main(unsigned long bist)
                );
 #endif
        }
-
 #endif
-
 }
-