Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / via / epia-m / romstage.c

diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c
index 8b8a96aa93841516cbf11ac7b1ab4299a3a9773a..54feb26552f88d484595cae45bcb20be1e423715 100644 (file)
--- a/src/mainboard/via/epia-m/romstage.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -1,19 +1,13 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
-#if 0
-#include <cpu/x86/lapic.h>
-#endif
 #include <arch/io.h>
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/via/vt8623/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -25,10 +19,6 @@
 #include "southbridge/via/vt8235/vt8235_early_smbus.c"
 #include "southbridge/via/vt8235/vt8235_early_serial.c"
 
-static void memreset_setup(void)
-{
-}
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
        return smbus_read_byte(device, address);
@@ -36,27 +26,27 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/via/vt8623/raminit.c"
 
-static void enable_mainboard_devices(void) 
+static void enable_mainboard_devices(void)
 {
        device_t dev;
-  
-       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+
+       dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_8235), 0);
-  
+
        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }
        pci_write_config8(dev, 0x50, 0x80);
        pci_write_config8(dev, 0x51, 0x1f);
 #if 0
-       // This early setup switches IDE into compatibility mode before PCI gets 
+       // This early setup switches IDE into compatibility mode before PCI gets
        // a chance to assign I/Os
        // movl    $CONFIG_ADDR(0, 0x89, 0x42), %eax
        // //      movb    $0x09, %dl
        // movb    $0x00, %dl
        // PCI_WRITE_CONFIG_BYTE
 #endif
-       /* we do this here as in V2, we can not yet do raw operations 
+       /* we do this here as in V2, we can not yet do raw operations
         * to pci!
         */
         dev += 0x100; /* ICKY */
@@ -68,7 +58,7 @@ static void enable_mainboard_devices(void)
        pci_write_config8(dev, 0x3d, 0);
 }
 
-static void enable_shadow_ram(void) 
+static void enable_shadow_ram(void)
 {
        device_t dev = 0; /* no need to look up 0:0.0 */
        unsigned char shadowreg;
@@ -81,7 +71,6 @@ static void enable_shadow_ram(void)
 
 static void main(unsigned long bist)
 {
-       unsigned long x;
        device_t dev;
 
        /*
@@ -93,7 +82,7 @@ static void main(unsigned long bist)
         * Disable the firewire stuff, which apparently steps on IO 0+ on
         * reset. Doh!
         */
-       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+       dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
                                PCI_DEVICE_ID_VIA_6305), 0);
        if (dev != PCI_DEV_INVALID) {
                pci_write_config8(dev, 0x15, 0x1c);
@@ -105,37 +94,28 @@ static void main(unsigned long bist)
 
        enable_smbus();
 
-       print_spew("In romstage.c:main()\r\n");
-
        /* Halt if there was a built in self test failure */
        report_bist_failure(bist);
 
        // init_timer();
 
-       outb(5, 0x80);  
+       post_code(0x05);
 
-       print_debug(" Enabling mainboard devices\r\n");
+       print_debug(" Enabling mainboard devices\n");
        enable_mainboard_devices();
 
-       print_debug(" Enabling shadow ram\r\n");
+       print_debug(" Enabling shadow ram\n");
        enable_shadow_ram();
 
        ddr_ram_setup((const struct mem_controller *)0);
-       
+
        /* Check all of memory */
-#if 0
-       ram_check(0x00000000, msr.lo);
-#endif
 #if 0
        static const struct {
                unsigned long lo, hi;
        } check_addrs[] = {
                /* Check 16MB of memory @ 0*/
                { 0x00000000, 0x01000000 },
-#if TOTAL_CPUS > 1
-               /* Check 16MB of memory @ 2GB */
-               { 0x80000000, 0x81000000 },
-#endif
        };
        int i;
        for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
@@ -144,11 +124,12 @@ static void main(unsigned long bist)
 #endif
 
        if (bist == 0) {
-               print_debug(" Doing MTRR init.\r\n");
+               print_debug(" Doing MTRR init.\n");
                early_mtrr_init();
        }
 
        //dump_pci_devices();
-       
-       print_spew("Leaving romstage.c:main()\r\n");
+
+       print_spew("Leaving romstage.c:main()\n");
 }
+