This patch changes C7 CAR code to be a single assembler file instead

[coreboot.git] / src / mainboard / via / epia-cn / romstage.c

diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index 57bc0dec189f2fa70b5206123d13380565695737..5fbf84337e19c1c9e7b5ffdece53e88961727286 100644 (file)
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -19,9 +19,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define ASSEMBLY 1
-
-
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
@@ -30,7 +27,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
+#include "console/console.c"
 #include "lib/ramtest.c"
 #include "northbridge/via/cn700/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -89,7 +86,7 @@ static const struct mem_controller ctrl = {
        .channel0 = { 0x50 },
 };
 
-static void main(unsigned long bist)
+void main(unsigned long bist)
 {
        unsigned long x;
        device_t dev;
@@ -101,25 +98,26 @@ static void main(unsigned long bist)
        uart_init();
        console_init();
 
-       print_spew("In romstage.c:main()\r\n");
+       print_spew("In romstage.c:main()\n");
 
        enable_smbus();
        smbus_fixup(&ctrl);
 
        if (bist == 0) {
-               print_debug("doing early_mtrr\r\n");
+               print_debug("doing early_mtrr\n");
                early_mtrr_init();
        }
 
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);
 
-       print_debug("Enabling mainboard devices\r\n");
+       print_debug("Enabling mainboard devices\n");
        enable_mainboard_devices();
 
        ddr_ram_setup(&ctrl);
 
        /* ram_check(0, 640 * 1024); */
 
-       print_spew("Leaving romstage.c:main()\r\n");
+       print_spew("Leaving romstage.c:main()\n");
 }
+