Use DIMM0 et al in lots more places instead of hardocding values.

[coreboot.git] / src / mainboard / via / epia-cn / romstage.c

diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c
index eb7f294510a7c57aabec8565379fd5893d398c33..5053924217fa50e0f0108ddd4b8bc56e186630da 100644 (file)
--- a/src/mainboard/via/epia-cn/romstage.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -27,14 +27,14 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
+#include <lib.h>
 #include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "southbridge/via/vt8235/vt8235_early_serial.c"
+#include <spd.h>
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -76,7 +76,7 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 },
+       .channel0 = { DIMM0 },
 };
 
 void main(unsigned long bist)
@@ -93,11 +93,6 @@ void main(unsigned long bist)
        enable_smbus();
        smbus_fixup(&ctrl);
 
-       if (bist == 0) {
-               print_debug("doing early_mtrr\n");
-               early_mtrr_init();
-       }
-
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);