* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#define ASSEMBLY 1
-
-
#include <stdint.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
+#include <console/console.h>
+#include <lib.h>
#include "northbridge/via/cn700/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/lapic/boot_cpu.c"
#include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
#include "southbridge/via/vt8235/vt8235_early_serial.c"
-
-static void memreset_setup(void)
-{
-}
+#include <spd.h>
static inline int spd_read_byte(unsigned device, unsigned address)
{
static void enable_mainboard_devices(void)
{
device_t dev;
- u8 reg;
-
+
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
if (dev == PCI_DEV_INVALID)
die("Southbridge not found!!!\n");
.d0f4 = 0x4000,
.d0f7 = 0x7000,
.d1f0 = 0x8000,
- .channel0 = { 0x50 },
+ .channel0 = { DIMM0 },
};
-static void main(unsigned long bist)
+void main(unsigned long bist)
{
- unsigned long x;
- device_t dev;
-
/* Enable multifunction for northbridge. */
pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
uart_init();
console_init();
- print_spew("In romstage.c:main()\r\n");
+ print_spew("In romstage.c:main()\n");
enable_smbus();
smbus_fixup(&ctrl);
- if (bist == 0) {
- print_debug("doing early_mtrr\r\n");
- early_mtrr_init();
- }
-
/* Halt if there was a built-in self test failure. */
report_bist_failure(bist);
- print_debug("Enabling mainboard devices\r\n");
+ print_debug("Enabling mainboard devices\n");
enable_mainboard_devices();
ddr_ram_setup(&ctrl);
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving romstage.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\n");
}