some progress on kconfig:
[coreboot.git] / src / mainboard / via / epia / auto.c
index d4a4d30ad30ca6b959c44b47e8b8bd0bbc160a2d..e490402ba05c1b008ee40b7d59e17e403aefcdaa 100644 (file)
@@ -1,56 +1,43 @@
 #define ASSEMBLY 1
 
-
 #include <stdint.h>
 #include <device/pci_def.h>
-#include <cpu/p6/apic.h>
 #include <arch/io.h>
-#include <device/pnp.h>
+#include <device/pnp_def.h>
 #include <arch/romcc_io.h>
+#include <arch/hlt.h>
+#include <stdlib.h>
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
-#include "ram/ramtest.c"
+#include "lib/ramtest.c"
 #include "northbridge/via/vt8601/raminit.h"
+#include "cpu/x86/mtrr/earlymtrr.c"
+#include "cpu/x86/bist.h"
+
 /*
  */
-void udelay(int usecs) 
+void udelay(unsigned usecs) 
 {
        int i;
-       for(i = 0; i < usecs; i++)
+       for (i = 0; i < usecs; i++)
                outb(i&0xff, 0x80);
 }
 
 #include "lib/delay.c"
-#include "cpu/p6/boot_cpu.c"
-#include "debug.c"
+#include "cpu/x86/lapic/boot_cpu.c"
+#include "lib/debug.c"
 
 #include "southbridge/via/vt8231/vt8231_early_smbus.c"
-
-#define MAXIMUM_CONSOLE_LOGLEVEL 6
-#define DEFAULT_CONSOLE_LOGLEVEL 6
-
 #include "southbridge/via/vt8231/vt8231_early_serial.c"
-static void memreset_setup(void)
-{
-}
 
-/*
-  static void memreset(int controllers, const struct mem_controller *ctrl)
-  {
-  }
-*/
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
-       unsigned char c;
-       c = smbus_read_byte(device, address);
-       return c;
+       return smbus_read_byte(device, address);
 }
 
-
-
 #include "northbridge/via/vt8601/raminit.c"
 /*
-  #include "sdram/generic_sdram.c"
+  #include "lib/generic_sdram.c"
 */
 
 static void enable_mainboard_devices(void) 
@@ -63,6 +50,7 @@ static void enable_mainboard_devices(void)
        if (dev == PCI_DEV_INVALID) {
                die("Southbridge not found!!!\n");
        }
+
        pci_write_config8(dev, 0x50, 7);
        pci_write_config8(dev, 0x51, 0xff);
 #if 0
@@ -77,39 +65,50 @@ static void enable_mainboard_devices(void)
        /* we do this here as in V2, we can not yet do raw operations 
         * to pci!
         */
-        dev += 0x100; /* ICKY */
+       /* changed this to work correctly on later revisions of LB.
+       * The original dev += 0x100; stopped working. It also appears
+       * that if this is not set here, but in ide_init() only, the IDE
+       * does not work at all. I assume it needs to be set before something else,
+       * possibly before enabling the IDE peripheral, or it is a timing issue.
+       * Ben Hewson 29 Apr 2007.
+       */
 
+       dev = pci_locate_device(PCI_ID(0x1106,0x0571), 0);
        pci_write_config8(dev, 0x42, 0);
 }
 
 static void enable_shadow_ram(void) 
 {
-       device_t dev = 0; /* no need to look up 0:0.0 */
+       device_t dev = 0;
        unsigned char shadowreg;
-       /* dev 0 for southbridge */
+
        shadowreg = pci_read_config8(dev, 0x63);
        /* 0xf0000-0xfffff */
        shadowreg |= 0x30;
        pci_write_config8(dev, 0x63, shadowreg);
 }
 
-static void main(void)
+static void main(unsigned long bist)
 {
        unsigned long x;
-       /*      init_timer();*/
-       outb(5, 0x80);
        
+       if (bist == 0) {
+               early_mtrr_init();
+       }
        enable_vt8231_serial();
-       enable_mainboard_devices();
        uart_init();
        console_init();
+
+       /* Halt if there was a built in self test failure */
+       report_bist_failure(bist);
        
+       enable_mainboard_devices();
        enable_smbus();
        enable_shadow_ram();
+
        /*
-         memreset_setup();
          this is way more generic than we need.
-         sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
+         sdram_initialize(ARRAY_SIZE(cpu), cpu);
        */
        sdram_set_registers((const struct mem_controller *) 0);
        sdram_set_spd_registers((const struct mem_controller *) 0);
@@ -131,7 +130,7 @@ static void main(void)
 #endif
        };
        int i;
-       for(i = 0; i < sizeof(check_addrs)/sizeof(check_addrs[0]); i++) {
+       for(i = 0; i < ARRAY_SIZE(check_addrs); i++) {
                ram_check(check_addrs[i].lo, check_addrs[i].hi);
        }
 #endif