Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / tyan / s4882 / resourcemap.c

diff --git a/src/mainboard/tyan/s4882/resourcemap.c b/src/mainboard/tyan/s4882/resourcemap.c
index 423ac3cf00d83030cdb47bde1143b92c33efdfd6..2ee274960dac475f3415565d8e104ef4f7412f2d 100644 (file)
--- a/src/mainboard/tyan/s4882/resourcemap.c
+++ b/src/mainboard/tyan/s4882/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s4882_resource_map(void)
         *         1 = base/limit registers i are read-only
         * [ 7: 4] Reserved
         * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-        *         This field defines the upper address bits of a 40bit address 
+        *         This field defines the upper address bits of a 40bit address
         *         that defines the start of memory-mapped I/O region i
         */
        PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -200,7 +200,7 @@ static void setup_s4882_resource_map(void)
         * [ 3: 2] Reserved
         * [ 4: 4] VGA Enable
         *         0 = VGA matches Disabled
-        *         1 = matches all address < 64K and where A[9:0] is in the 
+        *         1 = matches all address < 64K and where A[9:0] is in the
         *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
         * [ 5: 5] ISA Enable
         *         0 = ISA matches Disabled
@@ -208,7 +208,7 @@ static void setup_s4882_resource_map(void)
         *             from matching agains this base/limit pair
         * [11: 6] Reserved
         * [24:12] PCI I/O Base i
-        *         This field defines the start of PCI I/O region n 
+        *         This field defines the start of PCI I/O region n
         * [31:25] Reserved
         */
        PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
@@ -252,13 +252,13 @@ static void setup_s4882_resource_map(void)
         * [31:24] Bus Number Limit i
         *         This field defines the highest bus number in configuration regin i
         */
-       PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000103,
+//     PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0xff000103,
        PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
        PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
        };
        int max;
-       max = sizeof(register_values)/sizeof(register_values[0]);
+       max = ARRAY_SIZE(register_values);
        setup_resource_map(register_values, max);
 }