- See Issue Tracker id-13 "lnxi-patch-13".
[coreboot.git] / src / mainboard / tyan / s4880 / auto.c
index 12c0c9541c0a39a5287d697d26cb5058d7dd5b61..bcabf22eef5b4cc54baa2dbc6a4e43da21e993f4 100644 (file)
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 #include "cpu/amd/mtrr/amd_earlymtrr.c"
 #include "cpu/x86/bist.h"
+#include "cpu/amd/dualcore/dualcore.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
+/* Look up a which bus a given node/link combination is on.
+ * return 0 when we can't find the answer.
+ */
+static unsigned node_link_to_bus(unsigned node, unsigned link)
+{
+        unsigned reg;
+        
+        for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
+                unsigned config_map;
+                config_map = pci_read_config32(PCI_DEV(0, 0x18, 1), reg);
+                if ((config_map & 3) != 3) {
+                        continue; 
+                }       
+                if ((((config_map >> 4) & 7) == node) &&
+                        (((config_map >> 8) & 3) == link))
+                {       
+                        return (config_map >> 16) & 0xff;
+                }       
+        }       
+        return 0;
+}       
+
 static void hard_reset(void)
 {
+        device_t dev;
+
+        /* Find the device */
+        dev = PCI_DEV(node_link_to_bus(0, 2), 0x04, 3);
+
         set_bios_reset();
 
         /* enable cf9 */
-        pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
+        pci_write_config8(dev, 0x41, 0xf1);
         /* reset */
         outb(0x0e, 0x0cf9);
 }
 
 static void soft_reset(void)
 {
+        device_t dev;
+
+        /* Find the device */
+        dev = PCI_DEV(node_link_to_bus(0, 2), 0x04, 0);
+
         set_bios_reset();
-        pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
+        pci_write_config8(dev, 0x47, 1);
 }
 
 static void memreset_setup(void)
@@ -70,6 +103,14 @@ static inline void activate_spd_rom(const struct mem_controller *ctrl)
         smbus_write_byte(SMBUS_HUB , 0x01, device);
         smbus_write_byte(SMBUS_HUB , 0x03, 0);
 }
+#if 0
+static inline void change_i2c_mux(unsigned device)
+{
+#define SMBUS_HUB 0x18
+        smbus_write_byte(SMBUS_HUB , 0x01, device);
+        smbus_write_byte(SMBUS_HUB , 0x03, 0);
+}
+#endif
 
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
@@ -85,11 +126,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
  /* tyan does not want the default */
 #include "resourcemap.c"
 
-#if CONFIG_LOGICAL_CPUS==1
-#define SET_NB_CFG_54 1
-#include "cpu/amd/dualcore/dualcore.c"
-#endif
-
 #define FIRST_CPU  1
 #define SECOND_CPU 1
 
@@ -162,46 +198,9 @@ static void main(unsigned long bist)
        };
        int i;
         int needs_reset;
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
 
         if (bist == 0) {
-                /* Skip this if there was a built in self test failure */
-                amd_early_mtrr_init();
-
-#if CONFIG_LOGICAL_CPUS==1
-                set_apicid_cpuid_lo();
-#endif
-
-                enable_lapic();
-                init_timer();
-
-#if CONFIG_LOGICAL_CPUS==1
-                id = get_node_core_id_x();
-                if(id.coreid == 0) {
-                        if (cpu_init_detected(id.nodeid)) {
-                                asm volatile ("jmp __cpu_reset");
-                        }
-                        distinguish_cpu_resets(id.nodeid);
-                }
-#else
-                nodeid = lapicid();
-                if (cpu_init_detected(nodeid)) {
-                        asm volatile ("jmp __cpu_reset");
-                }
-                distinguish_cpu_resets(nodeid);
-#endif
-
-                if (!boot_cpu()
-#if CONFIG_LOGICAL_CPUS==1 
-                        || (id.coreid != 0)
-#endif
-                ) {
-                        stop_this_cpu(); 
-                }
+               k8_init_and_stop_secondaries();
         }
 
         w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
@@ -215,11 +214,6 @@ static void main(unsigned long bist)
 
         needs_reset = setup_coherent_ht_domain();
 
-#if CONFIG_LOGICAL_CPUS==1
-        start_other_cores();
-#endif
-
-        // automatically set that for you, but you might meet tight space
         needs_reset |= ht_setup_chains_x();
        
         if (needs_reset) {
@@ -227,8 +221,11 @@ static void main(unsigned long bist)
                 soft_reset();
         }
        
+#if 0
+       dump_pci_devices();
+#endif
        enable_smbus();
-       
+
        memreset_setup();
        sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);