nvidia/mcp55: Move HAVE_HARD_RESET to southbridge

[coreboot.git] / src / mainboard / tyan / s2912_fam10 / Kconfig

diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig
index 1f9ed0c3cd250358be13c06cf72d610f1891cc8d..910181df02eb354da01694ab3bcbac4292e1f89f 100644 (file)
--- a/src/mainboard/tyan/s2912_fam10/Kconfig
+++ b/src/mainboard/tyan/s2912_fam10/Kconfig
@@ -8,19 +8,19 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select DIMM_REGISTERED
        select NORTHBRIDGE_AMD_AMDFAM10
        select SOUTHBRIDGE_NVIDIA_MCP55
+       select MCP55_USE_NIC
        select SUPERIO_WINBOND_W83627HF
        select HAVE_BUS_CONFIG
        select HAVE_OPTION_TABLE
        select HAVE_PIRQ_TABLE
        select HAVE_MP_TABLE
-       select CACHE_AS_RAM
-       select HAVE_HARD_RESET
        select LIFT_BSP_APIC_ID
        select BOARD_ROMSIZE_KB_1024
+       select RAMINIT_SYSINFO
        select ENABLE_APIC_EXT_ID
        select AMDMCT
-       select TINY_BOOTBLOCK
        select MMCONF_SUPPORT_DEFAULT
+       select QRANK_DIMM_SUPPORT
 
 config MAINBOARD_DIR
        string
@@ -78,10 +78,6 @@ config SERIAL_CPU_INIT
        bool
        default n
 
-config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
-       hex
-       default 0x2912
-
 config IRQ_SLOT_COUNT
        int
        default 11
@@ -102,4 +98,8 @@ config HEAP_SIZE
        hex
        default 0xc0000
 
+config MCP55_PCI_E_X_0
+       int
+       default 1
+
 endif # BOARD_TYAN_S2912_FAM10