uses HAVE_MP_TABLE
+uses CONFIG_CBFS
uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses LB_CKS_RANGE_START
uses LB_CKS_RANGE_END
uses LB_CKS_LOC
+uses HAVE_ACPI_TABLES
+uses HAVE_ACPI_RESUME
+uses HAVE_HIGH_TABLES
+uses HAVE_LOW_TABLES
+uses CONFIG_MULTIBOOT
+uses HAVE_SMI_HANDLER
uses MAINBOARD
uses MAINBOARD_PART_NUMBER
uses MAINBOARD_VENDOR
uses CONFIG_CONSOLE_BTEXT
uses HAVE_INIT_TIMER
uses CONFIG_GDB_STUB
-uses CONFIG_CHIP_NAME
uses CONFIG_CONSOLE_VGA
+uses CONFIG_VGA_ROM_RUN
uses CONFIG_PCI_ROM_RUN
uses HW_MEM_HOLE_SIZEK
uses DCACHE_RAM_BASE
uses DCACHE_RAM_SIZE
uses CONFIG_USE_INIT
+uses CONFIG_USE_PRINTK_IN_CAR
uses HT_CHAIN_UNITID_BASE
uses HT_CHAIN_END_UNITID_BASE
uses CONFIG_LB_MEM_TOPK
## ROM_SIZE is the size of boot ROM that this board will use.
-#512K bytes
-default ROM_SIZE=524288
-
-#1M bytes
-#default ROM_SIZE=1048576
+default ROM_SIZE=1024*1024
##
## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
##
default HAVE_HARD_RESET=1
+##
+## Build SMI handler
+##
+default HAVE_SMI_HANDLER=0
+
##
## Build code to export a programmable irq routing table
##
##
default HAVE_MP_TABLE=1
+##
+## Build code to provide ACPI support
+##
+default HAVE_ACPI_TABLES=1
+default HAVE_LOW_TABLES=1
+default HAVE_HIGH_TABLES=1
+default CONFIG_MULTIBOOT=0
+
##
## Build code to export a CMOS option table
##
default LB_CKS_RANGE_END=122
default LB_CKS_LOC=123
+#VGA Console
+default CONFIG_CONSOLE_VGA=1
+default CONFIG_PCI_ROM_RUN=1
+default CONFIG_VGA_ROM_RUN=1
+
##
## Build code for SMP support
## Only worry about 2 micro processors
##
default CONFIG_GDB_STUB=0
+default CONFIG_USE_PRINTK_IN_CAR=1
+
##
## The Serial Console
##
default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
### End Options.lb
+#
+# CBFS
+#
+#
+default CONFIG_CBFS=0
end