Since some people disapprove of white space cleanups mixed in regular commits

[coreboot.git] / src / mainboard / tyan / s2891 / resourcemap.c

diff --git a/src/mainboard/tyan/s2891/resourcemap.c b/src/mainboard/tyan/s2891/resourcemap.c
index ad559b2dedaef1c2c4aa9d89a4bd61caaf072236..d76f1d6f4740ea83c0d77e240a5405e3dbe5d41a 100644 (file)
--- a/src/mainboard/tyan/s2891/resourcemap.c
+++ b/src/mainboard/tyan/s2891/resourcemap.c
@@ -6,7 +6,6 @@
 static void setup_s2891_resource_map(void)
 {
        static const unsigned int register_values[] = {
-#if 1
                /* Careful set limit registers before base registers which contain the enables */
                /* DRAM Limit i Registers
                 * F1:0x44 i = 0
@@ -80,8 +79,6 @@ static void setup_s2891_resource_map(void)
                PCI_ADDR(0, 0x18, 1, 0x68), 0x0000f8fc, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0x70), 0x0000f8fc, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0x78), 0x0000f8fc, 0x00000000,
-#endif
-#if 1
 
                /* Memory-Mapped I/O Limit i Registers
                 * F1:0x84 i = 0
@@ -147,7 +144,7 @@ static void setup_s2891_resource_map(void)
                 *         1 = base/limit registers i are read-only
                 * [ 7: 4] Reserved
                 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-                *         This field defines the upper address bits of a 40bit address 
+                *         This field defines the upper address bits of a 40bit address
                 *         that defines the start of memory-mapped I/O region i
                 */
                PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -158,8 +155,6 @@ static void setup_s2891_resource_map(void)
                PCI_ADDR(0, 0x18, 1, 0xA8), 0x000000f0, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xB0), 0x000000f0, 0x00000000,
 //             PCI_ADDR(0, 0x18, 1, 0xB8), 0x000000f0, 0x00fc0003,
-#endif
-#if 1
 
                /* PCI I/O Limit i Registers
                 * F1:0xC4 i = 0
@@ -187,7 +182,7 @@ static void setup_s2891_resource_map(void)
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC4), 0xFE000FC8, 0x01fff000,
-               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000, 
+               PCI_ADDR(0, 0x18, 1, 0xCC), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xD4), 0xFE000FC8, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xDC), 0xFE000FC8, 0x00000000,
 
@@ -205,7 +200,7 @@ static void setup_s2891_resource_map(void)
                 * [ 3: 2] Reserved
                 * [ 4: 4] VGA Enable
                 *         0 = VGA matches Disabled
-                *         1 = matches all address < 64K and where A[9:0] is in the 
+                *         1 = matches all address < 64K and where A[9:0] is in the
                 *             range 3B0-3BB or 3C0-3DF independen of the base & limit registers
                 * [ 5: 5] ISA Enable
                 *         0 = ISA matches Disabled
@@ -213,14 +208,14 @@ static void setup_s2891_resource_map(void)
                 *             from matching agains this base/limit pair
                 * [11: 6] Reserved
                 * [24:12] PCI I/O Base i
-                *         This field defines the start of PCI I/O region n 
+                *         This field defines the start of PCI I/O region n
                 * [31:25] Reserved
                 */
 //             PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000033,
                PCI_ADDR(0, 0x18, 1, 0xC8), 0xFE000FCC, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xD0), 0xFE000FCC, 0x00000000,
                PCI_ADDR(0, 0x18, 1, 0xD8), 0xFE000FCC, 0x00000000,
-#endif
+
                /* Config Base and Limit i Registers
                 * F1:0xE0 i = 0
                 * F1:0xE4 i = 1
@@ -257,17 +252,15 @@ static void setup_s2891_resource_map(void)
                 * [31:24] Bus Number Limit i
                 *         This field defines the highest bus number in configuration region i
                 */
-#if 1
 //             PCI_ADDR(0, 0x18, 1, 0xE0), 0x0000FC88, 0x07000003, /* link 0 of cpu 0 --> Nvidia CK 804 Pro */
 //             PCI_ADDR(0, 0x18, 1, 0xE4), 0x0000FC88, 0x7f080203, /* link 2 of cpu 0 --> AMD8131      */
-               PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000, 
-               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000, 
-#endif
+               PCI_ADDR(0, 0x18, 1, 0xE8), 0x0000FC88, 0x00000000,
+               PCI_ADDR(0, 0x18, 1, 0xEC), 0x0000FC88, 0x00000000,
 
        };
 
        int max;
-       max = sizeof(register_values)/sizeof(register_values[0]);
+       max = ARRAY_SIZE(register_values);
        setup_resource_map(register_values, max);
 }