fix further build.h dependencies that were undetected before we enabled it on
[coreboot.git] / src / mainboard / tyan / s2881 / cache_as_ram_auto.c
index 1ced1c970d06ffa6e9f05faa07668cf85c6a2394..9d5edcb462a5f852593ddbe7139f653fce059b53 100644 (file)
@@ -1,5 +1,5 @@
 #define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
 
 #define QRANK_DIMM_SUPPORT 1
 
@@ -8,6 +8,7 @@
 #endif
  
 #include <stdint.h>
+#include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
@@ -17,7 +18,7 @@
 #include "pc80/mc146818rtc_early.c"
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
-#include "ram/ramtest.c"
+#include "lib/ramtest.c"
 
 #if 0
 static void post_code(uint8_t value) {
@@ -38,10 +39,6 @@ static void post_code(uint8_t value) {
 #include "cpu/amd/model_fxx/apic_timer.c"
 #include "lib/delay.c"
 
-#if CONFIG_USE_INIT == 0
-#include "lib/memcpy.c"
-#endif
-
 #include "cpu/x86/lapic/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "northbridge/amd/amdk8/debug.c"
@@ -90,7 +87,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "northbridge/amd/amdk8/raminit.c"
 #include "resourcemap.c"
 #include "northbridge/amd/amdk8/coherent_ht.c"
-#include "sdram/generic_sdram.c"
+#include "lib/generic_sdram.c"
 
 #include "cpu/amd/dualcore/dualcore.c"
 
@@ -102,7 +99,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/model_fxx/init_cpus.c"
 
 
-#if USE_FALLBACK_IMAGE == 1
+#if CONFIG_USE_FALLBACK_IMAGE == 1
 
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
@@ -125,7 +122,7 @@ void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
 
         enumerate_ht_chain();
 
-        /* Setup the ck804 */
+        /* Setup the amd8111 */
         amd8111_enable_rom();
 
         /* Is this a deliberate reset by the bios */
@@ -158,7 +155,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 
-#if USE_FALLBACK_IMAGE == 1
+#if CONFIG_USE_FALLBACK_IMAGE == 1
         failover_process(bist, cpu_init_detectedx);
 #endif
         real_main(bist, cpu_init_detectedx);
@@ -188,7 +185,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 //     post_code(0x32);
        
-       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();